Commit 4ccae81c authored by Boris Brezillon's avatar Boris Brezillon Committed by Scott Wood

mtd: nand: Add the sunxi NAND controller driver

We already have an SPL driver for the sunxi NAND controller, now add
the normal/standard one.

The source has been copied from Linux 4.6 with a few changes to make
it work in u-boot.
Signed-off-by: 's avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: 's avatarHans de Goede <hdegoede@redhat.com>
parent 42bd19ce
......@@ -136,7 +136,7 @@ int dram_init(void)
return 0;
}
#if defined(CONFIG_NAND_SUNXI) && defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_NAND_SUNXI)
static void nand_pinmux_setup(void)
{
unsigned int pin;
......@@ -173,6 +173,9 @@ void board_nand_init(void)
{
nand_pinmux_setup();
nand_clock_setup();
#ifndef CONFIG_SPL_BUILD
sunxi_nand_init();
#endif
}
#endif
......
......@@ -64,12 +64,14 @@ config NAND_PXA3XX
PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
config NAND_SUNXI
bool "Support for NAND on Allwinner SoCs in SPL"
bool "Support for NAND on Allwinner SoCs"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
select SYS_NAND_SELF_INIT
---help---
Enable support for NAND. This option allows SPL to read from
sunxi NAND using DMA transfers.
Enable support for NAND. This option enables the standard and
SPL drivers.
The SPL driver only supports reading from the NAND using DMA
transfers.
config NAND_ARASAN
bool "Configure Arasan Nand"
......
......@@ -66,6 +66,7 @@ obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
obj-$(CONFIG_NAND_PLAT) += nand_plat.o
obj-$(CONFIG_NAND_SUNXI) += sunxi_nand.o
else # minimal SPL drivers
......
This diff is collapsed.
......@@ -135,6 +135,8 @@
#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SPL_NAND_SUPPORT 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8
#endif
#ifdef CONFIG_SPL_SPI_SUNXI
......
......@@ -155,6 +155,7 @@ enum fdt_compat_id {
COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
COMPAT_SUNXI_NAND, /* SUNXI NAND controller */
COMPAT_COUNT,
};
......
......@@ -142,3 +142,6 @@ __attribute__((noreturn)) void nand_boot(void);
int get_nand_env_oob(struct mtd_info *mtd, unsigned long *result);
#endif
int spl_nand_erase_one(int block, int page);
/* platform specific init functions */
void sunxi_nand_init(void);
......@@ -65,6 +65,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
};
const char *fdtdec_get_compatible(enum fdt_compat_id id)
......
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