Commit b4141195 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Tom Rini

linux/kernel.h: sync min, max, min3, max3 macros with Linux

U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument
Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: default avatarPavel Machek <pavel@denx.de>
Acked-by: default avatarLukasz Majewski <l.majewski@samsung.com>
Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: default avatarTom Rini <trini@ti.com>
parent 111396cc
......@@ -16,7 +16,7 @@
#define BIT(x) (1 << (x))
#define MAX_PREDIV 64
#define MAX_POSTDIV 8
#define MAX_POSTDIV 8UL
#define MAX_MULT 512
#define MAX_DIV (MAX_PREDIV * MAX_POSTDIV)
......@@ -362,7 +362,7 @@ static void init_pll(const struct pll_init_data *data)
pllctl_reg_write(data->pll, ctl, tmp);
mult = data->pll_freq / fpll;
for (mult = max(mult, 1); mult <= MAX_MULT; mult++) {
for (mult = max(mult, 1UL); mult <= MAX_MULT; mult++) {
div = (fpll * mult) / data->pll_freq;
if (div < 1 || div > MAX_DIV)
continue;
......
......@@ -1422,8 +1422,8 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits,
return 1;
for (i = 1; i <= loops; i++) {
const unsigned int effective_div = max(min(input_rate / i /
target_rate, cap), 1);
const unsigned int effective_div =
max(min(input_rate / i / target_rate, cap), 1U);
const unsigned int effective_rate = input_rate / i /
effective_div;
const int error = target_rate - effective_rate;
......
......@@ -151,7 +151,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
}
for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
todo = min(uboot_size - upto, (1 << 15));
todo = min(uboot_size - upto, (unsigned int)(1 << 15));
spi_rx_tx(regs, todo, (void *)(uboot_addr),
(void *)(SPI_FLASH_UBOOT_POS), i);
}
......
......@@ -45,8 +45,8 @@ static void update_window(struct dc_ctlr *dc, struct disp_ctl_win *win)
writel(0, &dc->win.h_initial_dda);
writel(0, &dc->win.v_initial_dda);
h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1);
v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1);
h_dda = (win->w * 0x1000) / max(win->out_w - 1, 1U);
v_dda = (win->h * 0x1000) / max(win->out_h - 1, 1U);
val = h_dda << H_DDA_INC_SHIFT;
val |= v_dda << V_DDA_INC_SHIFT;
......
......@@ -72,7 +72,7 @@ unsigned long __gclk_set_rate(unsigned int id, enum gclk_parent parent,
sm_writel(PM_GCCTRL(id), parent | SM_BIT(CEN));
rate = parent_rate;
} else {
divider = min(255, divider / 2 - 1);
divider = min(255UL, divider / 2 - 1);
sm_writel(PM_GCCTRL(id), parent | SM_BIT(CEN) | SM_BIT(DIVEN)
| SM_BF(DIV, divider));
rate = parent_rate / (2 * (divider + 1));
......
......@@ -168,7 +168,7 @@ static int jtag_getc(struct stdio_dev *dev)
inbound_len = emudat;
} else {
/* store the bytes */
leftovers_len = min(4, inbound_len);
leftovers_len = min((size_t)4, inbound_len);
inbound_len -= leftovers_len;
leftovers = emudat;
}
......
......@@ -121,7 +121,7 @@ static void dma_calc_size(unsigned long ldst, unsigned long lsrc, size_t count,
*dshift = WDSIZE_P;
#endif
*bpos = min(limit, ffs(ldst | lsrc | count)) - 1;
*bpos = min(limit, (unsigned long)ffs(ldst | lsrc | count)) - 1;
}
/* This version misbehaves for count values of 0 and 2^16+.
......@@ -157,7 +157,7 @@ void dma_memcpy_nocache(void *dst, const void *src, size_t count)
#ifdef PSIZE
/* The max memory DMA peripheral transfer size is 4 bytes. */
dsize |= min(2, bpos) << PSIZE_P;
dsize |= min(2UL, bpos) << PSIZE_P;
#endif
/* Copy sram functions from sdram to sram */
......
......@@ -300,7 +300,7 @@ unsigned int setup_ddr_tlbs_phys(phys_addr_t p_addr,
unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
u64 memsize = (u64)memsize_in_meg << 20;
memsize = min(memsize, CONFIG_MAX_MEM_MAPPED);
memsize = min(memsize, (u64)CONFIG_MAX_MEM_MAPPED);
memsize = tlb_map_range(ram_tlb_address, p_addr, memsize, TLB_MAP_RAM);
if (memsize)
......
......@@ -1661,7 +1661,7 @@ static void program_mode(unsigned long *dimm_populated,
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE)
t_wr_ns = max(t_wr_ns,
t_wr_ns = max(t_wr_ns, (unsigned long)
spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
}
......@@ -1838,12 +1838,18 @@ static void program_tr(unsigned long *dimm_populated,
else
sdram_ddr1 = false;
t_rcd_ns = max(t_rcd_ns, spd_read(iic0_dimm_addr[dimm_num], 29) >> 2);
t_rrd_ns = max(t_rrd_ns, spd_read(iic0_dimm_addr[dimm_num], 28) >> 2);
t_rp_ns = max(t_rp_ns, spd_read(iic0_dimm_addr[dimm_num], 27) >> 2);
t_ras_ns = max(t_ras_ns, spd_read(iic0_dimm_addr[dimm_num], 30));
t_rc_ns = max(t_rc_ns, spd_read(iic0_dimm_addr[dimm_num], 41));
t_rfc_ns = max(t_rfc_ns, spd_read(iic0_dimm_addr[dimm_num], 42));
t_rcd_ns = max(t_rcd_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 29) >> 2);
t_rrd_ns = max(t_rrd_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 28) >> 2);
t_rp_ns = max(t_rp_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 27) >> 2);
t_ras_ns = max(t_ras_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 30));
t_rc_ns = max(t_rc_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 41));
t_rfc_ns = max(t_rfc_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 42));
}
}
......@@ -1916,9 +1922,12 @@ static void program_tr(unsigned long *dimm_populated,
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE) {
t_wpc_ns = max(t_wtr_ns, spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
t_wtr_ns = max(t_wtr_ns, spd_read(iic0_dimm_addr[dimm_num], 37) >> 2);
t_rpc_ns = max(t_rpc_ns, spd_read(iic0_dimm_addr[dimm_num], 38) >> 2);
t_wpc_ns = max(t_wtr_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 36) >> 2);
t_wtr_ns = max(t_wtr_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 37) >> 2);
t_rpc_ns = max(t_rpc_ns,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 38) >> 2);
}
}
......@@ -2314,7 +2323,8 @@ static void program_ecc(unsigned long *dimm_populated,
for (dimm_num = 0; dimm_num < MAXDIMMS; dimm_num++) {
/* If a dimm is installed in a particular slot ... */
if (dimm_populated[dimm_num] != SDRAM_NONE)
ecc = max(ecc, spd_read(iic0_dimm_addr[dimm_num], 11));
ecc = max(ecc,
(unsigned long)spd_read(iic0_dimm_addr[dimm_num], 11));
}
if (ecc == 0)
return;
......
......@@ -126,7 +126,7 @@ void arch_lmb_reserve(struct lmb *lmb)
#endif
size = min(bootm_size, get_effective_memsize());
size = min(size, CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
size = min(size, (ulong)CONFIG_SYS_LINUX_LOWMEM_MAX_SIZE);
if (size < bootm_size) {
ulong base = bootmap_base + size;
......
......@@ -39,7 +39,7 @@ int sandbox_early_getopt_check(void)
max_arg_len = 0;
for (i = 0; i < num_options; ++i)
max_arg_len = max(strlen(sb_opt[i]->flag), max_arg_len);
max_arg_len = max((int)strlen(sb_opt[i]->flag), max_arg_len);
max_noarg_len = max_arg_len + 7;
for (i = 0; i < num_options; ++i) {
......
......@@ -20,7 +20,7 @@ static void config_pci_bridge(struct pci_controller *hose, pci_dev_t dev,
{
u8 secondary;
hose->read_byte(hose, dev, PCI_SECONDARY_BUS, &secondary);
hose->last_busno = max(hose->last_busno, secondary);
hose->last_busno = max(hose->last_busno, (int)secondary);
pci_hose_scan_bus(hose, secondary);
}
......
......@@ -22,7 +22,7 @@ unsigned install_e820_map(unsigned max_entries, struct e820entry *entries)
{
int i;
unsigned num_entries = min(lib_sysinfo.n_memranges, max_entries);
unsigned num_entries = min((unsigned)lib_sysinfo.n_memranges, max_entries);
if (num_entries < lib_sysinfo.n_memranges) {
printf("Warning: Limiting e820 map to %d entries.\n",
num_entries);
......
......@@ -114,7 +114,7 @@ static void show_eeprom(void)
e.date[3] & 0x80 ? "PM" : "");
/* Show MAC addresses */
for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) {
for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
u8 *p = e.mac[i];
......@@ -223,7 +223,7 @@ static int prog_eeprom(void)
*/
for (i = 0, p = &e; i < sizeof(e); i += 8, p += 8) {
ret = i2c_write(CONFIG_SYS_I2C_EEPROM_ADDR, i, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
p, min((sizeof(e) - i), 8));
p, min((int)(sizeof(e) - i), 8));
if (ret)
break;
udelay(5000); /* 5ms write cycle timing */
......@@ -461,7 +461,7 @@ int mac_read_from_eeprom(void)
memset(e.mac[8], 0xff, 6);
#endif
for (i = 0; i < min(e.mac_count, MAX_NUM_PORTS); i++) {
for (i = 0; i < min(e.mac_count, (u8)MAX_NUM_PORTS); i++) {
if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
char ethaddr[18];
......
......@@ -236,7 +236,7 @@ static int ccdm_mmc_read(struct mmc *mmc, u64 src, u8 *dst, int size)
tmp_buf);
if (!n)
goto failure;
result = min(size, blk_len - ofs);
result = min(size, (int)(blk_len - ofs));
memcpy(dst, tmp_buf + ofs, result);
dst += result;
size -= result;
......@@ -736,7 +736,8 @@ do_bin_func:
src_buf = buf;
for (ptr = (uint8_t *)src_buf, i = 20; i > 0;
i -= data_size, ptr += data_size)
memcpy(ptr, data, min(i, data_size));
memcpy(ptr, data,
min_t(size_t, i, data_size));
}
}
bin_func(dst_reg->digest, src_buf, 20);
......
......@@ -37,7 +37,7 @@ static void malta_lcd_puts(const char *str)
void *reg = (void *)CKSEG1ADDR(MALTA_ASCIIPOS0);
/* print up to 8 characters of the string */
for (i = 0; i < min(strlen(str), 8); i++) {
for (i = 0; i < min((int)strlen(str), 8); i++) {
__raw_writel(str[i], reg);
reg += MALTA_ASCIIPOS1 - MALTA_ASCIIPOS0;
}
......
......@@ -210,9 +210,9 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
*/
bootline = getenv("bootargs");
if (bootline) {
memcpy((void *) bootaddr, bootline,
max(strlen(bootline), 255));
flush_cache(bootaddr, max(strlen(bootline), 255));
memcpy((void *)bootaddr, bootline,
max(strlen(bootline), (size_t)255));
flush_cache(bootaddr, max(strlen(bootline), (size_t)255));
} else {
sprintf(build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
tmp = getenv("bootfile");
......@@ -240,9 +240,9 @@ int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
CONFIG_SYS_VXWORKS_ADD_PARAMS);
#endif
memcpy((void *) bootaddr, build_buf,
max(strlen(build_buf), 255));
flush_cache(bootaddr, max(strlen(build_buf), 255));
memcpy((void *)bootaddr, build_buf,
max(strlen(build_buf), (size_t)255));
flush_cache(bootaddr, max(strlen(build_buf), (size_t)255));
}
/*
......
......@@ -18,7 +18,6 @@
static struct spi_flash *flash;
/*
* This function computes the length argument for the erase command.
* The length on which the command is to operate can be given in two forms:
......@@ -71,9 +70,9 @@ static ulong bytes_per_second(unsigned int len, ulong start_ms)
{
/* less accurate but avoids overflow */
if (len >= ((unsigned int) -1) / 1024)
return len / (max(get_timer(start_ms) / 1024, 1));
return len / (max(get_timer(start_ms) / 1024, 1UL));
else
return 1024 * len / max(get_timer(start_ms), 1);
return 1024 * len / max(get_timer(start_ms), 1UL);
}
static int do_spi_flash_probe(int argc, char * const argv[])
......@@ -223,7 +222,7 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset,
ulong last_update = get_timer(0);
for (; buf < end && !err_oper; buf += todo, offset += todo) {
todo = min(end - buf, flash->sector_size);
todo = min_t(size_t, end - buf, flash->sector_size);
if (get_timer(last_update) > 100) {
printf(" \rUpdating, %zu%% %lu B/s",
100 - (end - buf) / scale,
......@@ -421,7 +420,8 @@ static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
for (i = 0; i < len; i++) {
if (vbuf[i] != 0xff) {
printf("Check failed at %d\n", i);
print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0);
print_buffer(i, vbuf + i, 1,
min_t(uint, len - i, 0x40), 0);
return -1;
}
}
......@@ -443,9 +443,11 @@ static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
for (i = 0; i < len; i++) {
if (buf[i] != vbuf[i]) {
printf("Verify failed at %d, good data:\n", i);
print_buffer(i, buf + i, 1, min(len - i, 0x40), 0);
print_buffer(i, buf + i, 1,
min_t(uint, len - i, 0x40), 0);
printf("Bad data:\n");
print_buffer(i, vbuf + i, 1, min(len - i, 0x40), 0);
print_buffer(i, vbuf + i, 1,
min_t(uint, len - i, 0x40), 0);
return -1;
}
}
......
......@@ -132,7 +132,7 @@ static int writeenv(size_t offset, u_char *buf)
u_char *char_ptr;
blocksize = nand_info[0].erasesize;
len = min(blocksize, CONFIG_ENV_SIZE);
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_saved < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
......@@ -244,7 +244,7 @@ static int readenv(size_t offset, u_char *buf)
if (!blocksize)
return 1;
len = min(blocksize, CONFIG_ENV_SIZE);
len = min(blocksize, (size_t)CONFIG_ENV_SIZE);
while (amount_loaded < CONFIG_ENV_SIZE && offset < end) {
if (nand_block_isbad(&nand_info[0], offset)) {
......
......@@ -1199,7 +1199,8 @@ int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
*/
int fdt_alloc_phandle(void *blob)
{
int offset, phandle = 0;
int offset;
uint32_t phandle = 0;
for (offset = fdt_next_node(blob, -1, NULL); offset >= 0;
offset = fdt_next_node(blob, offset, NULL)) {
......
......@@ -746,7 +746,7 @@ static void splash_align_axis(int *axis, unsigned long panel_size,
else
return;
*axis = max(0, axis_alignment);
*axis = max(0, (int)axis_alignment);
}
#endif
......@@ -1145,8 +1145,8 @@ U_BOOT_ENV_CALLBACK(splashimage, on_splashimage);
void lcd_position_cursor(unsigned col, unsigned row)
{
console_col = min(col, CONSOLE_COLS - 1);
console_row = min(row, CONSOLE_ROWS - 1);
console_col = min_t(short, col, CONSOLE_COLS - 1);
console_row = min_t(short, row, CONSOLE_ROWS - 1);
}
int lcd_get_pixel_width(void)
......
......@@ -300,7 +300,8 @@ static int usb_hub_configure(struct usb_device *dev)
}
descriptor = (struct usb_hub_descriptor *)buffer;
length = min(descriptor->bLength, sizeof(struct usb_hub_descriptor));
length = min_t(int, descriptor->bLength,
sizeof(struct usb_hub_descriptor));
if (usb_get_hub_descriptor(dev, buffer, length) < 0) {
debug("usb_hub_configure: failed to get hub " \
......
......@@ -730,7 +730,7 @@ static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
u16 now_blocks; /* number of blocks per iteration */
u32 transfer_size; /* number of bytes per iteration */
now_blocks = min(MAX_SATA_BLOCKS_READ_WRITE, blocks);
now_blocks = min((u16)MAX_SATA_BLOCKS_READ_WRITE, blocks);
transfer_size = ATA_SECT_SIZE * now_blocks;
if (transfer_size > user_buffer_size) {
......
......@@ -303,7 +303,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
#ifdef CONFIG_SYS_FSL_DDR4
/* tXP=max(4nCK, 6ns) */
int txp = max(mclk_ps * 4, 6000); /* unit=ps */
int txp = max((int)mclk_ps * 4, 6000); /* unit=ps */
trwt_mclk = 2;
twrt_mclk = 1;
act_pd_exit_mclk = picos_to_mclk(txp);
......@@ -312,7 +312,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
* MRS_CYC = max(tMRD, tMOD)
* tMRD = 8nCK, tMOD = max(24nCK, 15ns)
*/
tmrd_mclk = max(24, picos_to_mclk(15000));
tmrd_mclk = max(24U, picos_to_mclk(15000));
#elif defined(CONFIG_SYS_FSL_DDR3)
unsigned int data_rate = get_ddr_freq(0);
int txp;
......@@ -325,7 +325,7 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr,
* spec has not the tAXPD, we use
* tAXPD=1, need design to confirm.
*/
txp = max(mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
txp = max((int)mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000));
tmrd_mclk = 4;
/* set the turnaround time */
......@@ -511,8 +511,8 @@ static void set_timing_cfg_1(fsl_ddr_cfg_regs_t *ddr,
#ifdef CONFIG_SYS_FSL_DDR4
refrec_ctrl = picos_to_mclk(common_dimm->trfc1_ps) - 8;
wrrec_mclk = picos_to_mclk(common_dimm->twr_ps);
acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4);
wrtord_mclk = max(2, picos_to_mclk(2500));
acttoact_mclk = max(picos_to_mclk(common_dimm->trrds_ps), 4U);
wrtord_mclk = max(2U, picos_to_mclk(2500));
if ((wrrec_mclk < 1) || (wrrec_mclk > 24))
printf("Error: WRREC doesn't support %d clocks\n", wrrec_mclk);
else
......@@ -627,14 +627,14 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr,
wr_data_delay = popts->write_data_delay;
#ifdef CONFIG_SYS_FSL_DDR4
cpo = 0;
cke_pls = max(3, picos_to_mclk(5000));
cke_pls = max(3U, picos_to_mclk(5000));
#elif defined(CONFIG_SYS_FSL_DDR3)
/*
* cke pulse = max(3nCK, 7.5ns) for DDR3-800
* max(3nCK, 5.625ns) for DDR3-1066, 1333
* max(3nCK, 5ns) for DDR3-1600, 1866, 2133
*/
cke_pls = max(3, picos_to_mclk(mclk_ps > 1870 ? 7500 :
cke_pls = max(3U, picos_to_mclk(mclk_ps > 1870 ? 7500 :
(mclk_ps > 1245 ? 5625 : 5000)));
#else
cke_pls = FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR;
......@@ -1810,9 +1810,9 @@ static void set_timing_cfg_7(fsl_ddr_cfg_regs_t *ddr,
unsigned int txpr, tcksre, tcksrx;
unsigned int cke_rst, cksre, cksrx, par_lat, cs_to_cmd;
txpr = max(5, picos_to_mclk(common_dimm->trfc1_ps + 10000));
tcksre = max(5, picos_to_mclk(10000));
tcksrx = max(5, picos_to_mclk(10000));
txpr = max(5U, picos_to_mclk(common_dimm->trfc1_ps + 10000));
tcksre = max(5U, picos_to_mclk(10000));
tcksrx = max(5U, picos_to_mclk(10000));
par_lat = 0;
cs_to_cmd = 0;
......@@ -1877,7 +1877,7 @@ static void set_timing_cfg_8(fsl_ddr_cfg_regs_t *ddr,
}
acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps);
wrtord_bg = max(4, picos_to_mclk(7500));
wrtord_bg = max(4U, picos_to_mclk(7500));
if (popts->otf_burst_chop_en)
wrtord_bg += 2;
......
......@@ -289,48 +289,58 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
* Find minimum tckmax_ps to find fastest slow speed,
* i.e., this is the slowest the whole system can go.
*/
tckmax_ps = min(tckmax_ps, dimm_params[i].tckmax_ps);
tckmax_ps = min(tckmax_ps,
(unsigned int)dimm_params[i].tckmax_ps);
#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
taamin_ps = max(taamin_ps, dimm_params[i].taa_ps);
taamin_ps = max(taamin_ps,
(unsigned int)dimm_params[i].taa_ps);
#endif
tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
trcd_ps = max(trcd_ps, dimm_params[i].trcd_ps);
trp_ps = max(trp_ps, dimm_params[i].trp_ps);
tras_ps = max(tras_ps, dimm_params[i].tras_ps);
tckmin_x_ps = max(tckmin_x_ps,
(unsigned int)dimm_params[i].tckmin_x_ps);
trcd_ps = max(trcd_ps, (unsigned int)dimm_params[i].trcd_ps);
trp_ps = max(trp_ps, (unsigned int)dimm_params[i].trp_ps);
tras_ps = max(tras_ps, (unsigned int)dimm_params[i].tras_ps);
#ifdef CONFIG_SYS_FSL_DDR4
trfc1_ps = max(trfc1_ps, dimm_params[i].trfc1_ps);
trfc2_ps = max(trfc2_ps, dimm_params[i].trfc2_ps);
trfc4_ps = max(trfc4_ps, dimm_params[i].trfc4_ps);
trrds_ps = max(trrds_ps, dimm_params[i].trrds_ps);
trrdl_ps = max(trrdl_ps, dimm_params[i].trrdl_ps);
tccdl_ps = max(tccdl_ps, dimm_params[i].tccdl_ps);
trfc1_ps = max(trfc1_ps,
(unsigned int)dimm_params[i].trfc1_ps);
trfc2_ps = max(trfc2_ps,
(unsigned int)dimm_params[i].trfc2_ps);
trfc4_ps = max(trfc4_ps,
(unsigned int)dimm_params[i].trfc4_ps);
trrds_ps = max(trrds_ps,
(unsigned int)dimm_params[i].trrds_ps);
trrdl_ps = max(trrdl_ps,
(unsigned int)dimm_params[i].trrdl_ps);
tccdl_ps = max(tccdl_ps,
(unsigned int)dimm_params[i].tccdl_ps);
#else
twr_ps = max(twr_ps, dimm_params[i].twr_ps);
twtr_ps = max(twtr_ps, dimm_params[i].twtr_ps);
trfc_ps = max(trfc_ps, dimm_params[i].trfc_ps);
trrd_ps = max(trrd_ps, dimm_params[i].trrd_ps);
trtp_ps = max(trtp_ps, dimm_params[i].trtp_ps);
twr_ps = max(twr_ps, (unsigned int)dimm_params[i].twr_ps);
twtr_ps = max(twtr_ps, (unsigned int)dimm_params[i].twtr_ps);
trfc_ps = max(trfc_ps, (unsigned int)dimm_params[i].trfc_ps);
trrd_ps = max(trrd_ps, (unsigned int)dimm_params[i].trrd_ps);
trtp_ps = max(trtp_ps, (unsigned int)dimm_params[i].trtp_ps);
#endif
trc_ps = max(trc_ps, dimm_params[i].trc_ps);
trc_ps = max(trc_ps, (unsigned int)dimm_params[i].trc_ps);
#if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
tis_ps = max(tis_ps, dimm_params[i].tis_ps);
tih_ps = max(tih_ps, dimm_params[i].tih_ps);
tds_ps = max(tds_ps, dimm_params[i].tds_ps);
tdh_ps = max(tdh_ps, dimm_params[i].tdh_ps);
tqhs_ps = max(tqhs_ps, dimm_params[i].tqhs_ps);
tis_ps = max(tis_ps, (unsigned int)dimm_params[i].tis_ps);
tih_ps = max(tih_ps, (unsigned int)dimm_params[i].tih_ps);
tds_ps = max(tds_ps, (unsigned int)dimm_params[i].tds_ps);
tdh_ps = max(tdh_ps, (unsigned int)dimm_params[i].tdh_ps);
tqhs_ps = max(tqhs_ps, (unsigned int)dimm_params[i].tqhs_ps);
/*
* Find maximum tdqsq_max_ps to find slowest.
*
* FIXME: is finding the slowest value the correct
* strategy for this parameter?
*/
tdqsq_max_ps = max(tdqsq_max_ps, dimm_params[i].tdqsq_max_ps);
tdqsq_max_ps = max(tdqsq_max_ps,
(unsigned int)dimm_params[i].tdqsq_max_ps);
#endif
refresh_rate_ps = max(refresh_rate_ps,
dimm_params[i].refresh_rate_ps);
(unsigned int)dimm_params[i].refresh_rate_ps);
/* extended_op_srt is either 0 or 1, 0 having priority */
extended_op_srt = min(extended_op_srt,
dimm_params[i].extended_op_srt);
(unsigned int)dimm_params[i].extended_op_srt);
}
outpdimm->ndimms_present = number_of_dimms - temp1;
......
......@@ -106,7 +106,8 @@ static void __get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
i2c_write(SPD_SPA1_ADDRESS, 0, 1, &dummy, 1);
ret = i2c_read(i2c_address, 0, 1,
(uchar *)((ulong)spd + 256),
min(256, sizeof(generic_spd_eeprom_t) - 256));
min(256,
(int)sizeof(generic_spd_eeprom_t) - 256));
}
#else
ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
......
......@@ -289,7 +289,7 @@ static int dfu_read_buffer_fill(struct dfu_entity *dfu, void *buf, int size)
readn = 0;
while (size > 0) {
/* get chunk that can be read */
chunk = min(size, dfu->b_left);
chunk = min((long)size, dfu->b_left);
/* consume */
if (chunk > 0) {
memcpy(buf, dfu->i_buf, chunk);
......
......@@ -127,7 +127,7 @@ static const struct {
static unsigned int set_i2c_bus_speed(const struct fsl_i2c *dev,
unsigned int i2c_clk, unsigned int speed)
{
unsigned short divider = min(i2c_clk / speed, (unsigned short) -1);
unsigned short divider = min(i2c_clk / speed, (unsigned int)USHRT_MAX);
/*
* We want to choose an FDR/DFSR that generates an I2C bus speed that
......
......@@ -143,7 +143,7 @@ int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
return -1;
}
len = min(p[1], din_len);
len = min((int)p[1], din_len);
cros_ec_dump_data("in", -1, p, len + 3);
/* Response code is first byte of message */
......
......@@ -610,7 +610,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
#endif
cfg->cfg.f_min = 400000;
cfg->cfg.f_max = min(gd->arch.sdhc_clk, 52000000);
cfg->cfg.f_max = min(gd->arch.sdhc_clk, (u32)52000000);
cfg->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
......
......@@ -197,7 +197,7 @@ static int pxa_mmc_do_read_xfer(struct mmc *mmc, struct mmc_data *data)
while (len) {
/* The controller has data ready */
if (readl(&regs->i_reg) & MMC_I_REG_RXFIFO_RD_REQ) {
size = min(len, PXAMMC_FIFO_SIZE);
size = min(len, (uint32_t)PXAMMC_FIFO_SIZE);
len -= size;
size /= 4;
......@@ -233,14 +233,14 @@ static int pxa_mmc_do_write_xfer(struct mmc *mmc, struct mmc_data *data)
while (len) {
/* The controller is ready to receive data */
if (readl(&regs->i_reg) & MMC_I_REG_TXFIFO_WR_REQ) {
size = min(len, PXAMMC_FIFO_SIZE);
size = min(len, (uint32_t)PXAMMC_FIFO_SIZE);
len -= size;
size /= 4;
while (size--)
writel(*buf++, &regs->txfifo);
if (min(len, PXAMMC_FIFO_SIZE) < 32)
if (min(len, (uint32_t)PXAMMC_FIFO_SIZE) < 32)
writel(MMC_PRTBUF_BUF_PART_FULL, &regs->prtbuf);
}
......
......@@ -203,7 +203,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
if (ret < 0)
return ret;
readlen = min(page_size - column, size);
readlen = min(page_size - column, (int)size);
memcpy(dst, page_buffer, readlen);
column = 0;
......
......@@ -315,7 +315,7 @@ int sandbox_erase_part(struct sandbox_spi_flash *sbsf, int size)
int ret;
while (size > 0) {
todo = min(size, sizeof(sandbox_sf_0xff));
todo = min(size, (int)sizeof(sandbox_sf_0xff));
ret = os_write(sbsf->fd, sandbox_sf_0xff, todo);
if (ret != todo)
return ret;
......
......@@ -313,10 +313,11 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
return ret;
#endif
byte_addr = offset % page_size;
chunk_len = min(len - actual, page_size - byte_addr);
chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
if (flash->spi->max_write_size)
chunk_len = min(chunk_len, flash->spi->max_write_size);
chunk_len = min(chunk_len,
(size_t)flash->spi->max_write_size);
spi_flash_addr(write_addr, cmd);
......
......@@ -256,7 +256,7 @@ static void nc_puts(struct stdio_dev *dev, const char *s)
len = strlen(s);
while (len) {
int send_len = min(len, sizeof(input_buffer));
int send_len = min(len, (int)sizeof(input_buffer));
nc_send_packet(s, send_len);