Commit d5cf3297 authored by Masahiro Yamada's avatar Masahiro Yamada

ARM: uniphier: support Debug UART

For ARM32 architecture, CONFIG_DEBUG_LL is available for early
low-level debugging (and actually UniPhier 32bit SoCs use it), but
ARM64 architecture does not support it.  Instead, CONFIG_DEBUG_UART
is available as an architecture-independent debug facility.

This commit supports it on all the UniPhier SoCs (including the new
ARMv8 SoCs), which is very useful for new SoC bringups.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
parent 650aedbf
......@@ -28,5 +28,6 @@ obj-y += boot-mode/
obj-y += dram/
obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/
obj-$(CONFIG_CPU_V7) += arm32/
#
# SPDX-License-Identifier: GPL-2.0+
#
ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += debug-uart-sld3.o
obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o
obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += debug-uart-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += debug-uart-ld20.o
endif
obj-y += debug-uart.o
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc64-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_LD20_UART_CLK 58820000
unsigned int uniphier_ld20_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(54); /* TXD0 */
sg_set_iectrl(58); /* TXD1 */
sg_set_iectrl(90); /* TXD2 */
sg_set_iectrl(94); /* TXD3 */
sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */
sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */
sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */
sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_PERI;
writel(tmp, SC_CLKCTRL4);
return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_LD4_UART_CLK 36864000
unsigned int uniphier_ld4_debug_uart_init(void)
{
sg_set_iectrl(0);
sg_set_pinsel(88, 1, 8, 4); /* HSDOUT6 -> TXD0 */
return DIV_ROUND_CLOSEST(UNIPHIER_LD4_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_LD6B_UART_CLK 88888888
unsigned int uniphier_ld6b_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(135, 3, 8, 4); /* PORT10 -> TXD0 */
sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */
sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PRO4_UART_CLK 73728000
unsigned int uniphier_pro4_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */
writel(1, SG_LOADPINCTRL);
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PRO5_UART_CLK 73728000
unsigned int uniphier_pro5_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(47, 0, 4, 8); /* TXD0 -> TXD0 */
sg_set_pinsel(49, 0, 4, 8); /* TXD1 -> TXD1 */
sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */
sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */
writel(1, SG_LOADPINCTRL);
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_PXS2_UART_CLK 88888888
unsigned int uniphier_pxs2_debug_uart_init(void)
{
u32 tmp;
sg_set_iectrl(0);
sg_set_pinsel(217, 8, 8, 4); /* TXD0 -> TXD0 */
sg_set_pinsel(115, 8, 8, 4); /* TXD1 -> TXD1 */
sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */
sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include "../bcu/bcu-regs.h"
#include "../sc-regs.h"
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_SLD3_UART_CLK 36864000
unsigned int uniphier_sld3_debug_uart_init(void)
{
u32 tmp;
sg_set_pinsel(64, 1, 4, 4); /* TXD0 -> TXD0 */
writel(0x24440000, BCSCR5);
tmp = readl(SC_CLKCTRL);
tmp |= SC_CLKCTRL_CEN_PERI;
writel(tmp, SC_CLKCTRL);
return DIV_ROUND_CLOSEST(UNIPHIER_SLD3_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <config.h>
#include <linux/kernel.h>
#include "../sg-regs.h"
#include "debug-uart.h"
#define UNIPHIER_SLD8_UART_CLK 80000000
unsigned int uniphier_sld8_debug_uart_init(void)
{
sg_set_iectrl(0);
sg_set_pinsel(70, 3, 8, 4); /* HSDOUT6 -> TXD0 */
return DIV_ROUND_CLOSEST(UNIPHIER_SLD8_UART_CLK, 16 * CONFIG_BAUDRATE);
}
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <debug_uart.h>
#include <linux/io.h>
#include <linux/serial_reg.h>
#include "../soc-info.h"
#include "debug-uart.h"
#define UNIPHIER_UART_TX 0x00
#define UNIPHIER_UART_LCR_MCR 0x10
#define UNIPHIER_UART_LSR 0x14
#define UNIPHIER_UART_LDR 0x24
static void _debug_uart_putc(int c)
{
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE))
;
writel(c, base + UNIPHIER_UART_TX);
}
void _debug_uart_init(void)
{
void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
unsigned int divisor;
switch (uniphier_get_soc_type()) {
#if defined(CONFIG_ARCH_UNIPHIER_SLD3)
case SOC_UNIPHIER_SLD3:
divisor = uniphier_sld3_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD4)
case SOC_UNIPHIER_LD4:
divisor = uniphier_ld4_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
case SOC_UNIPHIER_PRO4:
divisor = uniphier_pro4_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
case SOC_UNIPHIER_SLD8:
divisor = uniphier_sld8_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
case SOC_UNIPHIER_PRO5:
divisor = uniphier_pro5_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
case SOC_UNIPHIER_PXS2:
divisor = uniphier_pxs2_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
case SOC_UNIPHIER_LD6B:
divisor = uniphier_ld6b_debug_uart_init();
break;
#endif
#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
case SOC_UNIPHIER_LD11:
case SOC_UNIPHIER_LD20:
divisor = uniphier_ld20_debug_uart_init();
break;
#endif
default:
return;
}
writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
writel(divisor, base + UNIPHIER_UART_LDR);
}
DEBUG_UART_FUNCS
/*
* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _MACH_DEBUG_UART_H
#define _MACH_DEBUG_UART_H
unsigned int uniphier_sld3_debug_uart_init(void);
unsigned int uniphier_ld4_debug_uart_init(void);
unsigned int uniphier_pro4_debug_uart_init(void);
unsigned int uniphier_sld8_debug_uart_init(void);
unsigned int uniphier_pro5_debug_uart_init(void);
unsigned int uniphier_pxs2_debug_uart_init(void);
unsigned int uniphier_ld6b_debug_uart_init(void);
unsigned int uniphier_ld11_debug_uart_init(void);
unsigned int uniphier_ld20_debug_uart_init(void);
#endif /* _MACH_DEBUG_UART_H */
......@@ -5,6 +5,7 @@
*/
#include <common.h>
#include <debug_uart.h>
#include <spl.h>
#include "../init.h"
......@@ -14,6 +15,10 @@ void spl_board_init(void)
{
const struct uniphier_board_data *param;
#ifdef CONFIG_DEBUG_UART
debug_uart_init();
#endif
param = uniphier_get_board_param();
if (!param)
hang();
......
......@@ -169,6 +169,15 @@ config DEBUG_UART_PIC32
will need to provide parameters to make this work. The driver will
be available until the real driver model serial is running.
config DEBUG_UART_UNIPHIER
bool "UniPhier on-chip UART"
depends on ARCH_UNIPHIER
help
Select this to enable a debug UART using the UniPhier on-chip UART.
You will need to provide DEBUG_UART_BASE to make this work. The
driver will be available until the real driver-model serial is
running.
endchoice
config DEBUG_UART_BASE
......
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