1. 31 May, 2016 2 commits
    • Paul Burton's avatar
      MIPS: Split I & D cache line size config · 37228621
      Paul Burton authored
      Allow L1 Icache & L1 Dcache line size to be specified separately, since
      there's no architectural mandate that they be the same. The
      [id]cache_line_size functions are tidied up to take advantage of the
      fact that the Kconfig entries are always present to simply check them
      for zero rather than needing to #ifdef on their presence.
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
      [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h]
      Signed-off-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
    • Paul Burton's avatar
      MIPS: Move cache sizes to Kconfig · ace3be4f
      Paul Burton authored
      Move details of the L1 cache line sizes & total sizes into Kconfig,
      defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
      introduced to allow platforms to select auto-detection of cache sizes,
      and it defaults to being enabled if none of the cache sizes are set by
      the configuration (ie. sizes are all the default 0), and code is
      adjusted to #ifdef on that rather than on the definition of the sizes
      (which will always be defined even if 0).
      Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
  2. 25 May, 2016 1 commit
  3. 20 May, 2016 1 commit