1. 10 Jun, 2018 3 commits
    • Angus Ainslie's avatar
      m4 : add spi code · 524c7f61
      Angus Ainslie authored
      * add interrutps for times and uart code
      * add spi code with interrupts
      
      caveat: interrupts are not firing so the handlers are not getting
      called. There is a possibility that they are firing and the A53
      core is handling them before the M4 can.
      524c7f61
    • Angus Ainslie's avatar
      m4_main : refactor code · ac3d8d97
      Angus Ainslie authored
      * move uart functionality out to a seperate file
      * add code to check RDC for the M4
      * make it possible to have mailboxes in OCRAM or TCMU
      ac3d8d97
    • Angus Ainslie's avatar
      m4_main : lots of cleanup · 0a4f3793
      Angus Ainslie authored
      * fix the xputhex function
      * add xputint function
      * use the updated IOMUX variable
      * move some things out a header file
      * add gpio functionality
      0a4f3793