plat: imx8m: Add calls to query freq values

These values are board specific so expose them to OS to reduce
duplication.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>

plat/imx/common/imx8_sip_svc.c

@@ -35,7 +35,7 @@ uintptr_t imx_svc_smc_handler(uint32_t smc_fid,
 {
 	switch (smc_fid) {
 #if defined(PLAT_IMX8M) || defined(PLAT_IMX8MM) || defined(PLAT_IMX8MN)
-	case FSL_SIP_DDR_DVFS:
+	case IMX_SIP_DDR_DVFS:
 		SMC_RET1(handle, dram_dvfs_handler(smc_fid, x1, x2, x3));
 		break;
 	case  FSL_SIP_GPC:

plat/imx/common/imx8m/dram.c

@@ -10,6 +10,7 @@
 #include <mmio.h>
 #include <spinlock.h>
 #include <smccc.h>
+#include <imx_sip.h>
 
 static struct dram_info dram_info;
 
@@ -225,7 +226,7 @@ int dram_dvfs_handler(uint32_t smc_fid,
 	unsigned int target_freq = x1;
 	uint32_t online_cores = x2;
 
-	if (x1 == 0xf) {
+	if (x1 == IMX_SIP_DDR_DVFS_WAIT_CHANGE) {
 		/* set the WFE done status */
 		spin_lock(&dfs_lock);
 		wfe_done |= (1 << cpu_id * 8);
@@ -239,6 +240,17 @@ int dram_dvfs_handler(uint32_t smc_fid,
 				break;
 			}
 		}
+	} else if (x1 == IMX_SIP_DDR_DVFS_GET_FREQ_COUNT) {
+		int i;
+		for (i = 0; i < 4; ++i)
+			if (!dram_info.timing_info->fsp_table[i])
+				break;
+		return i;
+	} else if (x1 == IMX_SIP_DDR_DVFS_GET_FREQ_INFO) {
+		if (x2 < 4)
+			return dram_info.timing_info->fsp_table[x2];
+		else
+			return -3;
 	} else if (x1 < 4) {
 		wait_ddrc_hwffc_done = true;
 		dsb();

plat/imx/common/include/imx_sip.h

@@ -31,7 +31,10 @@
 #define IMX_SIP_BUILDINFO			0xC2000003
 #define IMX_SIP_BUILDINFO_GET_COMMITHASH	0x00
 
-#define FSL_SIP_DDR_DVFS		0xc2000004
+#define IMX_SIP_DDR_DVFS		0xc2000004
+#define IMX_SIP_DDR_DVFS_WAIT_CHANGE	0x0F
+#define IMX_SIP_DDR_DVFS_GET_FREQ_COUNT	0x10
+#define IMX_SIP_DDR_DVFS_GET_FREQ_INFO	0x11
 
 #define FSL_SIP_SRC			0xc2000005
 #define FSL_SIP_SRC_M4_START		0x00