Commit dac8d677 authored by Jacky Bai's avatar Jacky Bai

MLK-22207 plat: imx8m: Fix the data sync issue in dram dvfs flow

Explict memory barrier(DSB) is necessary to make sure
other cores observe the correct flags updated by the primary
core before the primary begins doing DRAM DVFS.
Signed-off-by: default avatarJacky Bai <ping.bai@nxp.com>
parent fecb1ef2
......@@ -228,6 +228,7 @@ int dram_dvfs_handler(uint32_t smc_fid,
/* set the WFE done status */
spin_lock(&dfs_lock);
wfe_done |= (1 << cpu_id * 8);
dsb();
spin_unlock(&dfs_lock);
while (1) {
......@@ -239,6 +240,7 @@ int dram_dvfs_handler(uint32_t smc_fid,
}
} else {
wait_ddrc_hwffc_done = true;
dsb();
/* trigger the IRQ */
for (int i = 0; i < 4; i++) {
int irq = irqs_used[i] % 32;
......
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