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Commit e6918e00 authored by Eric Kuzmenko's avatar Eric Kuzmenko
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Add thermal vias to RT8070's exposed pad

parent aee60871
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dvk-mx8m-bsb.pretty/RT8070.kicad_mod
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(module RT8070 (layer F.Cu) (tedit 5B25F157)
(module RT8070 (layer F.Cu) (tedit 5B29EAAC)
(descr https://www.richtek.com/assets/podfiles/PT-000014_FOOTPRINT.pdf)
(tags RT8070)
(solder_mask_margin 0.05)
(attr smd)
(fp_text reference RT8070 (at 0 4) (layer F.Fab)
(fp_text reference REF** (at 0 -3.5) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value REF** (at 0 -4) (layer F.SilkS)
(fp_text value RT8070 (at 0 3.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center -4.25 -1.905) (end -4.25 -1.805) (layer F.SilkS) (width 0.2))
(fp_line (start -2 -2.5) (end 2 -2.5) (layer Dwgs.User) (width 0.127))
(fp_line (start -2 2.5) (end 2 2.5) (layer Dwgs.User) (width 0.127))
(fp_line (start -2 -2.5) (end 2 -2.5) (layer F.SilkS) (width 0.127))
(fp_line (start -2 2.5) (end 2 2.5) (layer F.SilkS) (width 0.127))
(fp_line (start -2 -2.5) (end -2 2.5) (layer Dwgs.User) (width 0.127))
(fp_line (start 2 -2.5) (end 2 2.5) (layer Dwgs.User) (width 0.127))
(fp_line (start -3.71 -2.76) (end 3.71 -2.76) (layer Dwgs.User) (width 0.05))
(fp_line (start -3.71 2.76) (end 3.71 2.76) (layer Dwgs.User) (width 0.05))
(fp_line (start -3.71 -2.76) (end -3.71 2.76) (layer Dwgs.User) (width 0.05))
(fp_line (start 3.71 -2.76) (end 3.71 2.76) (layer Dwgs.User) (width 0.05))
(pad 1 smd rect (at -2.75 -1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.75 -0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.75 0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.75 1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 2.75 1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 2.75 0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 2.75 -0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 2.75 -1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 0 0) (size 2.3 2.3) (layers F.Cu F.Paste F.Mask))
(model ${KIPRJMOD}/packages3d/SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.35x2.35mm.wrl
(fp_circle (center -3.75 -1.905) (end -3.75 -1.83) (layer F.SilkS) (width 0.15))
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 0.9 0.9) (thickness 0.135)))
)
(fp_line (start -0.95 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.15))
(fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.15))
(fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.15))
(fp_line (start -1.95 2.45) (end -1.95 -1.45) (layer F.Fab) (width 0.15))
(fp_line (start -1.95 -1.45) (end -0.95 -2.45) (layer F.Fab) (width 0.15))
(fp_line (start -3.75 -2.75) (end -3.75 2.75) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.75 -2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.75 -2.75) (end 3.75 -2.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.75 2.75) (end 3.75 2.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.075 -2.575) (end -2.075 -2.525) (layer F.SilkS) (width 0.15))
(fp_line (start 2.075 -2.575) (end 2.075 -2.43) (layer F.SilkS) (width 0.15))
(fp_line (start 2.075 2.575) (end 2.075 2.43) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 2.575) (end -2.075 2.43) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 -2.575) (end 2.075 -2.575) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 2.575) (end 2.075 2.575) (layer F.SilkS) (width 0.15))
(fp_line (start -2.075 -2.525) (end -3.475 -2.525) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -2.75 -1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 2 smd rect (at -2.75 -0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 3 smd rect (at -2.75 0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 4 smd rect (at -2.75 1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 5 smd rect (at 2.75 1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 6 smd rect (at 2.75 0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 7 smd rect (at 2.75 -0.635) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 8 smd rect (at 2.75 -1.905) (size 1.3 0.7) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin -0.05))
(pad 9 smd rect (at 0.575 0.575) (size 1.15 1.15) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin_ratio -0.14))
(pad 9 smd rect (at 0.575 -0.575) (size 1.15 1.15) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin_ratio -0.14))
(pad 9 smd rect (at -0.575 0.575) (size 1.15 1.15) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin_ratio -0.14))
(pad 9 smd rect (at -0.575 -0.575) (size 1.15 1.15) (layers F.Cu F.Paste F.Mask)
(solder_paste_margin_ratio -0.14))
(pad 9 thru_hole circle (at 0 0) (size 0.4 0.4) (drill 0.3) (layers *.Cu F.Mask))
(pad 9 thru_hole circle (at -0.8 -0.8) (size 0.4 0.4) (drill 0.3) (layers *.Cu F.Mask))
(pad 9 thru_hole circle (at 0.8 -0.8) (size 0.4 0.4) (drill 0.3) (layers *.Cu F.Mask))
(pad 9 thru_hole circle (at 0.8 0.8) (size 0.4 0.4) (drill 0.3) (layers *.Cu F.Mask))
(pad 9 thru_hole circle (at -0.8 0.8) (size 0.4 0.4) (drill 0.3) (layers *.Cu F.Mask))
(model ${KISYS3DMOD}/Housings_SOIC.3dshapes/SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
......
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