Assign placeholder footprints to WWAN antennae (identical to GNSS ones for now), add haptic motor schematic symbol and split up the connector and motor footprints, now ready to generate netlist and import it into Pcbew without errors

Add proper WWAN reset circuit using a MMBT2222A NPN BJT along with a 100nF cap and a TVS diode, make needed adjustements to the WWAN's SIM card circuit (UIM-CLK and UIM-RESET caps are NC & added 4.7k series resistor to SIM_DETECT_O#), assign the MMBT2222A footprint to KiCad's official SOT-23 footprint (identical to the spec sheet's recommended land pattern)

If necessary, the NC cap pads on UIM-CLK and UIM-RESET can be tested with various values during the first prototype debugging phase.

Add pull-up resistor to nCS pin of the NOR flash chip, make electrolytic caps tantalums again due to a the price difference not being significant

Adjust the SoM outline footprint by rotating it 90 degrees and making the reference and value text the standard size (reference is now invisible), did the same for the SoM connector footprint (reference is visible), added baseboard connector 3D model to the EmCr_SOM_IMX8M_Connector footprint, removed the P1 connector from the SoM 3D model since P1 is now assigned to the EmCr_SOM_IMX8M_Connector footprint

added library symbol for short internal coaxial cables (from u.FL connector of M.2/MiniPCIE Card to ceramic antenna).
This component is not appearing at the pcb. The library symbols serves only as a memory aid.
Supplier information can be linked to it and should appear then on the BoM.

Old situation:
First footprint of the SOM contains outline, mounting holes, footprint of P1 and markers for positions of P2, P3 and P4.
Second, third and forth footprint contain only P2..P4 connectors.
This situation leads to a problem with the BoM, because the 4 identical connectors could not be grouped together.

New situation:
Outline, mounting holes and position markers are now located in the footprint which is assigned to the SOM placeholder
4 identical footprints assigned to the SOM's connectors P1..P4 contain only the connector footprint.
This shouldn't cause problems with the BoM.

Add mounting holes to the schematic and assign the associated M2 hole footprint, add fiducial marks to schematic and assign the associated 1mm diameter copper with 2mm diameter solder mask opening footprint, make various visual adjustments throughout the schematic

Replace logic gate packages with cheaper options, change associated footprints to ones which match the cheaper alternatives

Added additional XOR gate to the WWAN page. This makes it possible that the polarity of the SIM_DETECT signal is configurable by one single O-Ohm-resistor.
This adds more flexibility concerning modem choice, as there are both polarities of this signal used by different modem manufacturers.
Added placeholder symbol for modem card (which holds now datasheet/bom information). The MPCIE socket has datasheet information, too.
Picked two electrolytic capacitors (220uF/10V) by Panasonic by distributor TME.

Replace WWAN M.2 circuit with one intended for mPCIe modules, include 74LVC1G08 single 2-input AND gate, create the AND gate's footprint and use the official SOT-23-5 3D model

The mini-SIM slot will need to be replaced with one that has an active-LOW detection pin. Will want to see if we can find cheap electrolytic to replace a few of the tantalum caps with (not all since we still need some low ESR, high capacitance, low profile, caps).

Datasheet links and supplier information can be stored in these new library symbols.

Add silkscreen dot to all footprints which are missing one that need them to determine IC orientation

MX25L1606EZNI's land description explicitly states "Avoid placing vias or traces underneath the metal pad." This means that the exposed pad will need to be connected to ground through the top layer (and vias in other locations on the board, not at the exposed pad).

Add FDV301N footprint based on the manufacturer's given recommended land pattern, use lower ESR 220uF tantalum capacitors in place of previously selected ones, re-export the BoM

Double checked FET footprints to make sure those assigned to the official SOT-23 footprint are correct.

The 3D model is actually associated with the narrower package and can be considered a temporary placeholder.

Add thermal relief vias to the PTN5110 footprint's exposed pad and adjust the solder paste dimensions

The only difference between these two part numbers is the reel the chip comes in, both are identical ICs.