GitLab

Updated the note on camera's PWDN pin (13) to correctly say that it has an internal pull-up and not a pull-down. Removed the redundant via that was on top of an already existing identical one on the UIM-DATA net (located at X=83.736372, Y=104.553716).

In preperation for the final order, re-export all the manufacturing files using the current date and rev number v1.0.0

Add the fab's stackup, panel array working files, and their CPW calculations

Make the layer setup/3D render setting reflect the fact that the board should now have a 1.10mm nominal thickness

Add the same speaker trace width calculation screenshot from the prototypes to the final calculations directory (not different from the protos)

Correctly state 1.10mm as the nominal thickess of the board in the fabrication notes, make the wifi_bt_feed_janielectronics_microsctrip calculation screenshot show the most significant figure of the board height/thickness (+0.21mm of the prototype calculations)

The highest VIH(min) it will get to is ~3.0V, which is completely fine.

ive permittivity of 4.1~4.11

The H parameter in the calculations was +0.21mm greater than the H used in the p
rototype calculations (1.1mm thick board instead of 0.89mm thick)

A DK value of 4.11 was used for the GNSS and WWAN antennae feedlines and a DK of 4.1 was used for the Wi-Fi/BT feedlines since the operating frequency of the GNSS and WWAN is generally a bit lower than Wi-Fi/BT.

The NANYA NP-180TL spec sheet is also included. The specific prepreg/core/substrate/dielectric used is NANYA NP-180**TL** which has a DK specified as 4.1-4.3 @ 1GHz.

Add a TXB0101 logic level translator to the LCD_RESET# signal, the VIH(max) if the LCD's reset pin is 1.8V so the voltage needs to be translated from 3.3V logic down to 1.8V logic

The active TXB0101 level translator is used so that the pin can continue to be externally pulled low by a 10k resistor. The behavior of having this pin supplied with a logic level exceed its maximum rating is unpredictable (could be fine but could also act in unexpected ways). The TXB0101 is already used in the design as U1302, so now there will be 2x of these per board. This also requires two additional 0402 X5R 10V 100nF caps (already have 87 per board of CL05A104MP5NNNC / EmCraft PN: E-CAP-003-01, will now be 89 per board).

Specify in the schematic note that the OV5640 camera's 7-bit slave address is actually 0x3C (not 0x78 which is it's 8-bit write address with the LSB r/w bit set as 0)

The OV5640's datasheet mistakenly says 0x78 for the SCCB slave address (it's supposed to say 0x3C). In binary representation it's 0111 110x, with x as the r/w bit.

Move the M.2 mounting hole down 2.025 according to Amphenol in order for it to line up with the 2230 card's mounting hole

The WP pin needs to be brought to ground for the write protect to not be enabled by the chip.

Use the new MDT320E03001 M.2 socket footprint in the layout, make the corresponding changes in the layout for this new footprint to work

This M.2 socket is used instead of the previous one due to the M.2 module having components on the back which are as tall as 1.35mm.

Color the pins orange and dark-orange in the pinout spreadsheet for the pins which would critically conflict with EmCraft's basebaord device tree (resulting in an output connected to an output)

Since MISO/MOSI are correct on the upcoming prototypes then there's no need to point out the old error in the pinout spreadsheet, remove this remark in the spreadsheet

Re-exported the gerber files (fabrication drawing will need to be reproduced too).