1. 14 May, 2018 1 commit
  2. 12 May, 2018 3 commits
  3. 11 May, 2018 2 commits
  4. 10 May, 2018 2 commits
  5. 09 May, 2018 1 commit
  6. 08 May, 2018 1 commit
  7. 07 May, 2018 1 commit
  8. 05 May, 2018 1 commit
  9. 04 May, 2018 2 commits
  10. 03 May, 2018 1 commit
  11. 02 May, 2018 7 commits
  12. 30 Apr, 2018 1 commit
  13. 27 Apr, 2018 2 commits
  14. 25 Apr, 2018 2 commits
    • Eric Kuzmenko's avatar
      Use the main 18650 battery for the RTC (instead of a coin-cell), include... · 1163b3eb
      Eric Kuzmenko authored
      Use the main 18650 battery for the RTC (instead of a coin-cell), include information about which battery has been narrowed down to be the best option (NCR18650BD), remove 2K EEPROM used for the board ID (MAC address) since it won't be used
      1163b3eb
    • Eric Kuzmenko's avatar
      Have the charge controller IC handle the USB-C DRP PD switch mechanism, notes... · aee37d2c
      Eric Kuzmenko authored
      Have the charge controller IC handle the USB-C DRP PD switch mechanism, notes added on what procedure is required to operate as sink/source and how to swap between these roles
      
      The mainline kernel's TCPM implementation needs to be used in conjunction with the charge controller IC's interface. For example, if the TCPC (PTN5110HQ CC controller) has the USB configured as a sink role then the TCPM (i.MX8M) would read out the CC_STATUS and POWER_STATUS registers of the CC controller IC to know this is the case, and then it (i.MX8M) would configure the charge controller IC accordingly (sink current from VBUS).
      
      Both the CC controller and charge controller's open-drain output interrupt pins are tied together, which means if either of them pull the line low then the i.MX8M needs to check both of their fault registers to determine if a fault has occured on either chip. If the INT pin wasn't pulled low due to a fault then a status update event from either chip may have triggered it, which needs to be determined, as well as the corresponding action taken. These INT pins may need to be separated if the software side is too complex, so long as there's a spare interrupt pins available.
      
      Fast swap is not supported, and is not a requirement.
      aee37d2c
  15. 24 Apr, 2018 1 commit
  16. 20 Apr, 2018 2 commits
    • Eric Kuzmenko's avatar
      Replace instances of VSYS with VBAT to remove redundancy · 0152cc9a
      Eric Kuzmenko authored
      In the case where VBAT can drop below 3.3V then it may be required to use a buck-boost in place of the existing buck converter for the 3.3V rail; may need some testing. Using the +5V rail as an input would also work but would introduce additional losses. According to several sources, when a 18650 Li-ion reaches 3.3V it is practically depleted anyway. When the feedback voltage drops below the internal reference voltage the buck converter will be in its "low dropout operation" with a duty cycle of 100%, so the output voltage should closely follow the input voltage.
      0152cc9a
    • Eric Kuzmenko's avatar
      Add USB type C circuit with DRP PD capability, should sink near 2A @ 5-6.5V and source 550mA @ 5V · 3b1b0bc8
      Eric Kuzmenko authored
      Removed the reverse current protection circuit from the last commit due to the requirement changing to only 18650 battery and USB-C being possible power sources
      
      Next thing to add is the charging circuit when the USB-C is in sink mode/role
      3b1b0bc8
  17. 19 Apr, 2018 2 commits
  18. 18 Apr, 2018 3 commits
  19. 17 Apr, 2018 1 commit
  20. 16 Apr, 2018 4 commits