Commit 211c467b authored by Guido Gunther's avatar Guido Gunther 💤
Browse files

Merge branch 'camera' into 'imx8-4.18-wip'

Add support for the devkit camera

See merge request !29
parents 418cc45f d0cc883d
Pipeline #13560 passed with stage
in 39 minutes and 30 seconds
......@@ -22,6 +22,8 @@
#size-cells = <2>;
aliases {
csi0 = &mipi_csi_1;
csi1 = &mipi_csi_2;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
......
......@@ -121,18 +121,6 @@
default-state = "off";
};
csi_nrst {
label = "CSI_nRST";
gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
csi_pdwn {
label = "CSI_PDWN";
gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
spk_mute {
label = "SPK_MUTE";
gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
......@@ -225,9 +213,9 @@
pinctrl_csi1: csi1grp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x11 /* CSI_nRST */
MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 /* CSI_PWDN */
MX8MQ_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x19 /* CLK01 */
MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 /* CSI_nRST */
MX8MQ_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59 /* CLK01 */
>;
};
......@@ -888,18 +876,20 @@
status = "okay";
ov5640_mipi: ov5640_mipi@3c {
compatible = "ovti,ov5640";
compatible = "ovti,ov5640_mipi";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi1>;
reg = <0x3c>;
status = "okay";
clocks = <&clk IMX8MQ_CLK_CLKO1_DIV>;
clock-names = "xclk";
// TODO : need to change the parent clocks if we want 24Mhz
assigned-clocks = <&clk IMX8MQ_CLK_CLKO1_DIV>;
assigned-clock-rates = <12500000>;
clock-names = "csi_mclk";
assigned-clocks = <&clk IMX8MQ_CLK_CLKO1_SRC>,
<&clk IMX8MQ_CLK_CLKO1_DIV>;
assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_200M>;
assigned-clock-rates = <0>, <20000000>;
csi_id = <0>;
pwn-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
pwn-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
rst-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
mclk = <20000000>;
mclk_source = <0>;
port {
......@@ -1150,7 +1140,7 @@
&csi1_bridge {
fsl,mipi-mode;
/* fsl,two-8bit-sensor-mode; */
fsl,two-8bit-sensor-mode;
status = "okay";
port {
......
......@@ -136,6 +136,7 @@ CONFIG_FAILOVER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_DEBUG_DRIVER=y
CONFIG_DEBUG_DEVRES=y
CONFIG_CMA_SIZE_MBYTES=320
CONFIG_VEXPRESS_CONFIG=y
......@@ -302,7 +303,7 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_IMX=m
CONFIG_I2C_IMX=y
CONFIG_I2C_IMX_LPI2C=m
CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_I2C_SLAVE=y
......@@ -355,14 +356,11 @@ CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_V4L_PLATFORM_DRIVERS=y
# CONFIG_IMX8_MIPI_CSI2 is not set
CONFIG_VIDEO_MXC_CSI_CAMERA=y
CONFIG_MXC_MIPI_CSI=y
CONFIG_MXC_CAMERA_OV5640_V2=m
CONFIG_MXC_CAMERA_OV5640_MIPI_V2=m
CONFIG_MXC_CAMERA_OV5640_MIPI_V2=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_OV5640=m
CONFIG_IMX_DCSS_CORE=y
CONFIG_DRM=y
CONFIG_DRM_I2C_CH7006=m
......
......@@ -821,8 +821,8 @@ static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
__func__, reg, val);
dev_err(&client->dev, "%s: error: reg=0x%x, val=0x%x: %d\n",
__func__, reg, val, ret);
return ret;
}
......
......@@ -139,7 +139,6 @@ config VIDEO_MX8_CAPTURE
source "drivers/media/platform/imx8/Kconfig"
source "drivers/media/platform/mxc/capture/Kconfig"
source "drivers/media/platform/mxc/output/Kconfig"
source "drivers/media/platform/soc_camera/Kconfig"
source "drivers/media/platform/exynos4-is/Kconfig"
......
......@@ -96,9 +96,7 @@ ifeq ($(CONFIG_VIDEO_MXC_CAPTURE),y)
error "mxc capture defined $(CONFIG_VIDEO_MXC_CAPTURE)"
endif
#obj-$(CONFIG_VIDEO_MXC_CAPTURE) += mxc/capture/
obj-y += mxc/capture/
obj-$(CONFIG_VIDEO_MXC_OUTPUT) += mxc/output/
obj-$(CONFIG_VIDEO_MX8_CAPTURE) += mxc/capture/
obj-$(CONFIG_VIDEO_MX8_CAPTURE) += imx8/
obj-y += meson/
if VIDEO_MX8_CAPTURE
menu "IMX8 Camera ISI/MIPI Features support"
config IMX8_MEDIA_DEVICE
tristate "IMX8 Media Device Driver"
default y
config IMX8_CAPTURE_DRIVER
tristate "IMX8 Camera Controller"
depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
select V4L2_MEM2MEM_DEV
select VIDEOBUF2_DMA_CONTIG
default y
config IMX8_MIPI_CSI2
tristate "IMX8 MIPI CSI2 Controller"
select V4L2_FWNODE
default y
config IMX8_MIPI_CSI2_YAV
tristate "IMX8 MIPI CSI2 Controller Yet Another Version"
select V4L2_FWNODE
default y
config GMSL_MAX9286
tristate "Maxim max9286 GMSL Deserializer Input support"
select SENSOR_OV10635
depends on I2C
---help---
If you plan to use the max9286 GMSL Deserializer with your capture system, say Y here.
config IMX8_JPEG
tristate "IMX8 JPEG Encoder/Decoder"
depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
select V4L2_MEM2MEM_DEV
select VIDEOBUF2_DMA_CONTIG
default y
......
mxc-capture-objs := mxc-isi-core.o mxc-isi-cap.o mxc-isi-hw.o
obj-$(CONFIG_IMX8_CAPTURE_DRIVER) += mxc-capture.o
obj-$(CONFIG_IMX8_MIPI_CSI2) += mxc-mipi-csi2.o
obj-$(CONFIG_IMX8_MIPI_CSI2_YAV) += mxc-mipi-csi2_yav.o
max9286_gmsl-objs := max9286.o
obj-$(CONFIG_GMSL_MAX9286) += max9286_gmsl.o
obj-$(CONFIG_IMX8_MEDIA_DEVICE) += mxc-media-dev.o
obj-$(CONFIG_IMX8_JPEG) += mxc-jpeg-hw.o mxc-jpeg.o
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/*
* Copyright 2017 NXP
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later.
*/
#ifndef __MAX9286_H__
#define __MAX9286_H__
#define MIPI_CSI2_SENS_VC0_PAD_SOURCE 0
#define MIPI_CSI2_SENS_VC1_PAD_SOURCE 1
#define MIPI_CSI2_SENS_VC2_PAD_SOURCE 2
#define MIPI_CSI2_SENS_VC3_PAD_SOURCE 3
#define MIPI_CSI2_SENS_VCX_PADS_NUM 4
#define MAX_FPS 30
#define MIN_FPS 15
#define DEFAULT_FPS 30
/*!
* Maintains the information on the current state of the sesor.
*/
struct imxdpu_videomode {
char name[64]; /* may not be needed */
uint32_t pixelclock; /* Hz */
/* htotal (pixels) = hlen + hfp + hsync + hbp */
uint32_t hlen;
uint32_t hfp;
uint32_t hbp;
uint32_t hsync;
/* field0 - vtotal (lines) = vlen + vfp + vsync + vbp */
uint32_t vlen;
uint32_t vfp;
uint32_t vbp;
uint32_t vsync;
/* field1 */
uint32_t vlen1;
uint32_t vfp1;
uint32_t vbp1;
uint32_t vsync1;
uint32_t flags;
uint32_t format;
uint32_t dest_format; /*buffer format for capture*/
int16_t clip_top;
int16_t clip_left;
uint16_t clip_width;
uint16_t clip_height;
};
struct sensor_data {
struct v4l2_subdev subdev;
struct media_pad pads[MIPI_CSI2_SENS_VCX_PADS_NUM];
struct i2c_client *i2c_client;
struct v4l2_mbus_framefmt format;
struct v4l2_captureparm streamcap;
char running;
/* control settings */
int brightness;
int hue;
int contrast;
int saturation;
int red;
int green;
int blue;
int ae_mode;
u32 mclk;
u8 mclk_source;
struct clk *sensor_clk;
int v_channel;
bool is_mipi;
struct imxdpu_videomode cap_mode;
unsigned int sensor_num; /* sensor num connect max9271 */
unsigned char sensor_is_there; /* Bit 0~3 for 4 cameras, 0b1= is there; 0b0 = is not there */
int pwn_gpio;
};
#endif
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/*
* Copyright 2017 NXP
*/
/*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/delay.h>
#include <media/videobuf2-core.h>
#include "mxc-jpeg-hw.h"
enum mxc_jpeg_image_format {
MXC_JPEG_YUV420 = 0x0,
MXC_JPEG_YUV422 = 0x1,
MXC_JPEG_RGB = 0x2,
MXC_JPEG_YUV444 = 0x3,
MXC_JPEG_Y = 0x4,
MXC_JPEG_ARGB = 0x6,
};
void print_descriptor_info(struct mxc_jpeg_desc *desc)
{
printk(KERN_DEBUG " MXC JPEG NEXT PTR %x\n", desc->next_descpt_ptr);
printk(KERN_DEBUG " MXC JPEG BUF BASE0 %x\n", desc->buf_base0);
printk(KERN_DEBUG " MXC JPEG PITCH %d\n", desc->line_pitch);
printk(KERN_DEBUG " MXC JPEG BUF BASE %x\n", desc->stm_bufbase);
printk(KERN_DEBUG " MXC JPEG BUF SIZE %d\n", desc->stm_bufsize);
printk(KERN_DEBUG " MXC JPEG IMGSIZE %dx%d\n", desc->w, desc->h);
printk(KERN_DEBUG " MXC JPEG STM CTRL %x\n", desc->stm_ctrl);
}
void mxc_jpeg_enable_irq(void __iomem *reg, int slot)
{
writel(0xFFFFFFFF, reg + MXC_SLOT_OFFSET(slot, SLOT_IRQ_EN));
}
void mxc_jpeg_reset(void __iomem *reg)
{
writel(MXC_ENABLE_DEC, reg);
}
u32 mxc_jpeg_get_offset(void __iomem *reg, int slot)
{
return readl(reg + MXC_SLOT_OFFSET(slot, SLOT_BUF_PTR));
}
void mxc_jpeg_enc_config(void __iomem *reg, struct mxc_jpeg_desc *cfg_desc,
u32 cfg_handle, u32 tbl_handle, u32 jpg_handle)
{
u32 regval, slot;
writel(0x1e0, reg + CAST_STATUS0);
writel(0x3ff, reg + CAST_STATUS1);
writel(0x4b, reg + CAST_STATUS2);
slot = mxc_jpeg_get_slot(reg);
mxc_jpeg_enable_irq(reg, slot);
writel((1 << (slot + 4)), reg);
cfg_desc->next_descpt_ptr = 0;
cfg_desc->buf_base0 = tbl_handle;
cfg_desc->buf_base1 = 0;
cfg_desc->line_pitch = 0x300;
cfg_desc->stm_bufbase = jpg_handle;
cfg_desc->stm_bufsize = 0x100000;
cfg_desc->w = 0x0100;
cfg_desc->h = 0x0100;
cfg_desc->stm_ctrl = MXC_CONFIG_MOD;
//print_descriptor_info(cfg_desc);
writel(cfg_handle, reg + MXC_SLOT_OFFSET(slot, SLOT_NXT_DESCPT_PTR));
writel(cfg_handle | 1, reg +
MXC_SLOT_OFFSET(slot, SLOT_NXT_DESCPT_PTR));
writel((1 << (slot + 4)) | MXC_ENDIAN_MD | MXC_ENABLE_DEC |
MXC_DEC_GO, reg);
regval = readl(reg + STM_BUFBASE);
regval = readl(reg + MXC_SLOT_OFFSET(slot, SLOT_BUF_PTR));
}
int mxc_jpeg_enable(void __iomem *reg)
{
u32 regval;
regval = readl(reg);
writel(MXC_ENABLE_DEC, reg);
regval = readl(reg);
return regval;
}
void mxc_jpeg_go(void __iomem *reg)
{
u32 val;
val = readl(reg);
writel(MXC_ENDIAN_MD | MXC_DEC_GO | val, reg);
writel(0x4, reg + 0x134);
//print_cast_decoder_info(reg);
}
void print_cast_decoder_info(void __iomem *reg)
{
int regval;
regval = readl(reg + MXC_SLOT_OFFSET(0, SLOT_CUR_DESCPT_PTR));
printk(KERN_DEBUG " MXC_JPEG: CUR DESCPT PTR: %x\n", regval);
regval = readl(reg + 0x100);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 1: %x\n", regval);
regval = readl(reg + 0x104);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 2: %x\n", regval);
regval = readl(reg + 0x108);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 3: %x\n", regval);
regval = readl(reg + 0x10c);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 4: %x\n", regval);
regval = readl(reg + 0x110);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 5: %x\n", regval);
regval = readl(reg + 0x114);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 6: %x\n", regval);
regval = readl(reg + 0x118);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 7: %x\n", regval);
regval = readl(reg + 0x11c);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 8: %x\n", regval);
regval = readl(reg + 0x120);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 9: %x\n", regval);
regval = readl(reg + 0x124);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 10: %x\n", regval);
regval = readl(reg + 0x128);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 11: %x\n", regval);
regval = readl(reg + 0x12c);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 12: %x\n", regval);
regval = readl(reg + 0x130);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 13: %x\n", regval);
regval = readl(reg + 0x134);
printk(KERN_DEBUG " MXC_JPEG: CAST_INFO 14: %x\n", regval);
}
int mxc_jpeg_get_slot(void __iomem *reg)
{
int slot_val;
int i = 0;
int tmp = MXC_SLOT_EN;
slot_val = readl(reg) & 0xF0;
for (; tmp != tmp << 4; tmp = tmp << 1) {
if ((slot_val & tmp) == 0)
return i;
++i;
}
return -EINVAL;
}
void mxc_jpeg_enable_slot(void __iomem *reg, int slot)
{
u32 regval;
regval = readl(reg);
writel((1 << (slot + 4)) | regval, reg);
}
void mxc_jpeg_set_addrs(struct mxc_jpeg_desc *desc, u32 buf_base0, u32 bufbase)
{
desc->buf_base0 = buf_base0;
desc->stm_bufbase = bufbase;
}
int mxc_jpeg_set_params(struct mxc_jpeg_desc *desc, u32 bufsize,
u16 out_pitch, u32 format)
{
desc->line_pitch = out_pitch;
desc->stm_bufsize = bufsize;
switch (format) {
case V4L2_PIX_FMT_YUV32:
desc->stm_ctrl |= MXC_JPEG_YUV444 << 3;
break;
case V4L2_PIX_FMT_YUYV:
desc->stm_ctrl |= MXC_JPEG_YUV422 << 3;
break;
case V4L2_PIX_FMT_RGB32:
desc->stm_ctrl |= MXC_JPEG_RGB << 3;
break;
default:
return -1;
}
return 0;
}
void mxc_jpeg_set_res(struct mxc_jpeg_desc *desc, u16 w, u16 h)
{
desc->w = w;
desc->h = h;
}
void mxc_jpeg_set_desc(u32 desc, void __iomem *reg, int slot)
{
writel(desc | 1, reg + MXC_SLOT_OFFSET(slot, SLOT_NXT_DESCPT_PTR));
}
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