arm64: dts: fsl: enable the SNVS power key of the imx8mq

The imax8mq supports the SNVS power key. Enable it.
Signed-off-by: 's avatarAngus Ainslie (Purism) <angus@akkea.ca>
parent 859b297d
Pipeline #4950 passed with stage
in 40 minutes and 1 second
......@@ -6,6 +6,7 @@
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
#include "imx8mq-pinfunc.h"
......@@ -850,6 +851,39 @@
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
};
snvs: snvs@30370000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x30370000 0x10000>;
snvs_rtc: snvs-rtc-lp {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
regmap = <&snvs>;
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
/*
clocks = <&clks IMX8MQ_CLK_SNVS>;
clock-names = "snvs-rtc";
*/
};
snvs_poweroff: snvs-poweroff {
compatible = "syscon-poweroff";
regmap = <&snvs>;
offset = <0x38>;
value = <0x60>;
mask = <0x60>;
};
snvs_pwrkey: snvs-powerkey {
compatible = "fsl,sec-v4.0-pwrkey";
regmap = <&snvs>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
linux,keycode = <KEY_POWER>;
wakeup-source;
};
};
clk: clock-controller@30380000 {
compatible = "fsl,imx8mq-ccm";
reg = <0x30380000 0x10000>;
......
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