Commit c44366b3 authored by Bob Ham's avatar Bob Ham

Merge branch 'lcdusb' into 'imx8-4.18-wip'

Add -lcdusbhost.dts, combining -lcdonly and -usbhost

See merge request !15
parents 01758cca 5bcef2b6
Pipeline #4244 passed with stage
in 29 minutes and 27 seconds
......@@ -19,3 +19,4 @@ dtb-$(CONFIG_SOC_IMX8MQ) += librem5-evk.dtb
dtb-$(CONFIG_SOC_IMX8MQ) += librem5-evk-lcdonly.dtb
dtb-$(CONFIG_SOC_IMX8MQ) += librem5-evk-otg.dtb
dtb-$(CONFIG_SOC_IMX8MQ) += librem5-evk-usbhost.dtb
dtb-$(CONFIG_SOC_IMX8MQ) += librem5-evk-lcdusbhost.dtb
/*
* Copyright 2017 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&backlight_dsi {
default-brightness-level = <40>;
status = "okay";
};
&dcss {
status = "okay";
disp-dev = "mipi_disp";
clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
<&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
<&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
<&clk IMX8MQ_CLK_DC_PIXEL_DIV>,
<&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_DISP_DTRC_DIV>;
clock-names = "apb", "axi", "rtrm", "pix_div", "pix_out", "dtrc";
assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>,
<&clk IMX8MQ_CLK_DISP_AXI_SRC>,
<&clk IMX8MQ_CLK_DISP_RTRM_SRC>,
<&clk IMX8MQ_CLK_DISP_RTRM_PRE_DIV>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_800M>,
<&clk IMX8MQ_SYS1_PLL_800M>;
assigned-clock-rates = <594000000>,
<800000000>,
<400000000>,
<400000000>;
dcss_disp0: port@0 {
reg = <0>;
dcss_disp0_mipi_dsi: mipi_dsi {
remote-endpoint = <&mipi_dsi_in>;
};
};
};
&hdmi {
status = "disabled";
};
&mipi_dsi_phy {
status = "okay";
};
&mipi_dsi {
status = "okay";
assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
<&clk IMX8MQ_CLK_DSI_CORE_SRC>,
<&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
<&clk IMX8MQ_VIDEO_PLL1>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_266M>,
<&clk IMX8MQ_CLK_25M>;
assigned-clock-rates = <24000000>,
<266000000>,
<0>,
<599999999>;
port@1 {
mipi_dsi_in: endpoint {
remote-endpoint = <&dcss_disp0_mipi_dsi>;
};
};
};
&mipi_dsi_bridge {
status = "okay";
panel@0 {
compatible = "rocktech,jh057n00900";
/* Virtual channel number */
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dsi>;
backlight = <&backlight_dsi>;
reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
port {
panel1_in: endpoint {
remote-endpoint = <&mipi_dsi_bridge_out>;
};
};
};
port@1 {
mipi_dsi_bridge_out: endpoint {
remote-endpoint = <&panel1_in>;
};
};
};
......@@ -16,93 +16,4 @@
#include "librem5-evk.dtsi"
&backlight_dsi {
default-brightness-level = <40>;
status = "okay";
};
&dcss {
status = "okay";
disp-dev = "mipi_disp";
clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
<&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
<&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
<&clk IMX8MQ_CLK_DC_PIXEL_DIV>,
<&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_DISP_DTRC_DIV>;
clock-names = "apb", "axi", "rtrm", "pix_div", "pix_out", "dtrc";
assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>,
<&clk IMX8MQ_CLK_DISP_AXI_SRC>,
<&clk IMX8MQ_CLK_DISP_RTRM_SRC>,
<&clk IMX8MQ_CLK_DISP_RTRM_PRE_DIV>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_800M>,
<&clk IMX8MQ_SYS1_PLL_800M>;
assigned-clock-rates = <594000000>,
<800000000>,
<400000000>,
<400000000>;
dcss_disp0: port@0 {
reg = <0>;
dcss_disp0_mipi_dsi: mipi_dsi {
remote-endpoint = <&mipi_dsi_in>;
};
};
};
&hdmi {
status = "disabled";
};
&mipi_dsi_phy {
status = "okay";
};
&mipi_dsi {
status = "okay";
assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
<&clk IMX8MQ_CLK_DSI_CORE_SRC>,
<&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
<&clk IMX8MQ_VIDEO_PLL1>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_266M>,
<&clk IMX8MQ_CLK_25M>;
assigned-clock-rates = <24000000>,
<266000000>,
<0>,
<599999999>;
port@1 {
mipi_dsi_in: endpoint {
remote-endpoint = <&dcss_disp0_mipi_dsi>;
};
};
};
&mipi_dsi_bridge {
status = "okay";
panel@0 {
compatible = "rocktech,jh057n00900";
/* Virtual channel number */
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dsi>;
backlight = <&backlight_dsi>;
reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
port {
panel1_in: endpoint {
remote-endpoint = <&mipi_dsi_bridge_out>;
};
};
};
port@1 {
mipi_dsi_bridge_out: endpoint {
remote-endpoint = <&panel1_in>;
};
};
};
#include "librem5-evk-lcd.dtsi"
/*
* Copyright 2017 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "librem5-evk.dtsi"
#include "librem5-evk-lcd.dtsi"
#include "librem5-evk-usbhost.dtsi"
......@@ -16,8 +16,4 @@
#include "librem5-evk.dtsi"
&usb_dwc3_0 {
status = "okay";
extcon = <&typec_ptn5100>;
dr_mode = "host";
};
#include "librem5-evk-usbhost.dtsi"
/*
* Copyright 2017 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
&usb_dwc3_0 {
status = "okay";
extcon = <&typec_ptn5100>;
dr_mode = "host";
};
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