• Ralf Baechle's avatar
    MIPS: BPF: Fix load delay slots. · 0c5d1878
    Ralf Baechle authored
    
    
    The entire bpf_jit_asm.S is written in noreorder mode because "we know
    better" according to a comment.  This also prevented the assembler from
    throwing in the required NOPs for MIPS I processors which have no
    load-use interlock, thus the load's consumer might end up using the
    old value of the register from prior to the load.
    
    Fixed by putting the assembler in reorder mode for just the affected
    load instructions.  This is not enough for gas to actually try to be
    clever by looking at the next instruction and inserting a nop only
    when needed but as the comment said "we know better", so getting gas
    to unconditionally emit a NOP is just right in this case and prevents
    adding further ifdefery.
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    0c5d1878
bpf_jit_asm.S 6.84 KB