Commit 27ffef02 authored by Martin Kepplinger's avatar Martin Kepplinger
Browse files

dt-bindings: media: hi846 fixes

parent 19cf4c3d
Pipeline #69437 passed with stage
in 73 minutes and 56 seconds
...@@ -25,6 +25,12 @@ properties: ...@@ -25,6 +25,12 @@ properties:
items: items:
- description: Reference to the mclk clock. - description: Reference to the mclk clock.
assigned-clocks:
maxItems: 1
assigned-clock-rates:
maxItems: 1
reset-gpios: reset-gpios:
description: Reference to the GPIO connected to the RESETB pin. Active low. description: Reference to the GPIO connected to the RESETB pin. Active low.
maxItems: 1 maxItems: 1
...@@ -69,6 +75,8 @@ required: ...@@ -69,6 +75,8 @@ required:
- compatible - compatible
- reg - reg
- clocks - clocks
- assigned-clocks
- assigned-clock-rates
- vddio-supply - vddio-supply
- vdda-supply - vdda-supply
- vddd-supply - vddd-supply
...@@ -89,7 +97,9 @@ examples: ...@@ -89,7 +97,9 @@ examples:
reg = <0x20>; reg = <0x20>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csi1>; pinctrl-0 = <&pinctrl_csi1>;
clocks = <&clk>; clocks = <&clk 0>;
assigned-clocks = <&clk 0>;
assigned-clock-rates = <25000000>;
vdda-supply = <&reg_camera_vdda>; vdda-supply = <&reg_camera_vdda>;
vddd-supply = <&reg_camera_vddd>; vddd-supply = <&reg_camera_vddd>;
vddio-supply = <&reg_camera_vddio>; vddio-supply = <&reg_camera_vddio>;
...@@ -99,6 +109,8 @@ examples: ...@@ -99,6 +109,8 @@ examples:
port { port {
camera_out: endpoint { camera_out: endpoint {
remote-endpoint = <&csi1_ep1>; remote-endpoint = <&csi1_ep1>;
link-frequencies = /bits/ 64
<80000000 200000000>;
data-lanes = <1 2>; data-lanes = <1 2>;
}; };
}; };
......
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