1. 21 May, 2019 1 commit
  2. 30 Jul, 2018 1 commit
    • Vladimir Murzin's avatar
      ARM: 8783/1: NOMMU: Extend check for VBAR support · c803ce3f
      Vladimir Murzin authored
      
      
      ARMv8R adds support for VBAR and updates ID_PFR1 with the new filed
      Sec_frac (bits [23:20]):
      
      Security fractional field. When the Security field is 0000, determines
      the support for features from the ARMv7 Security Extensions. Permitted
      values are:
      
      0000 No features from the ARMv7 Security Extensions are implemented.
           This value is not supported in ARMv8 if ID_PFR1 bits [7:4] are zero.
      
      0001 The implementation includes the VBAR, and the TCR.PD0 and TCR.PD1
           bits.
      
      0010 As for 0001, plus the ability to access Secure or Non-secure
           physical memory is supported.
      
      All other values are reserved.
      
      This field is only valid when ID_PFR1[7:4] == 0, otherwise it holds
      the value 0000.
      Signed-off-by: default avatarVladimir Murzin <vladimir.murzin@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      c803ce3f
  3. 19 May, 2018 2 commits
  4. 21 Jan, 2018 1 commit
  5. 23 Oct, 2017 1 commit
  6. 12 Oct, 2017 1 commit
    • Nicolas Pitre's avatar
      ARM: 8700/1: nommu: always reserve address 0 away · 195320fd
      Nicolas Pitre authored
      
      
      Some nommu systems have RAM at address 0. When vectors are not located
      there, the very beginning of memory remains available for dynamic
      allocations. The memblock allocator explicitly skips the first page
      but the standard page allocator does not, and while it correctly returns
      a non-null struct page pointer for that page, page_address() gives 0
      which gets confused with NULL (out of memory) by callers despite having
      plenty of free memory left.
      Signed-off-by: default avatarNicolas Pitre <nico@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      195320fd
  7. 24 Apr, 2017 1 commit
    • Lorenzo Pieralisi's avatar
      ARM: Implement pci_remap_cfgspace() interface · b9cdbe6e
      Lorenzo Pieralisi authored
      
      
      The PCI bus specification (rev 3.0, 3.2.5 "Transaction Ordering and
      Posting") defines rules for PCI configuration space transactions ordering
      and posting, that state that configuration writes have to be non-posted
      transactions.
      
      Current ioremap interface on ARM provides mapping functions that provide
      "bufferable" writes transactions (ie ioremap uses MT_DEVICE memory type)
      aka posted writes, so PCI host controller drivers have no arch interface to
      remap PCI configuration space with memory attributes that comply with the
      PCI specifications for configuration space.
      
      Implement an ARM specific pci_remap_cfgspace() interface that allows to map
      PCI config memory regions with MT_UNCACHED memory type (ie strongly ordered
      - non-posted writes), providing a remap function that complies with PCI
      specifications for config space transactions.
      Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Russell King <linux@armlinux.org.uk>
      b9cdbe6e
  8. 29 Mar, 2017 1 commit
  9. 28 Feb, 2017 2 commits
  10. 05 May, 2016 2 commits
  11. 04 Apr, 2016 2 commits
    • Ard Biesheuvel's avatar
      ARM: memremap: implement arch_memremap_wb() · 9ab9e4fc
      Ard Biesheuvel authored
      
      
      The generic memremap() falls back to using ioremap_cache() to create
      MEMREMAP_WB mappings if the requested region is not already covered
      by the linear mapping, unless the architecture provides an implementation
      of arch_memremap_wb().
      
      Since ioremap_cache() is not appropriate on ARM to map memory with the
      same attributes used for the linear mapping, implement arch_memremap_wb()
      which does exactly that. Also, relax the WARN() check to allow MT_MEMORY_RW
      mappings of pfn_valid() pages.
      
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Acked-by: default avatarDan Williams <dan.j.williams@intel.com>
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      9ab9e4fc
    • Ard Biesheuvel's avatar
      ARM: reintroduce ioremap_cached() for creating cached I/O mappings · 20c5ea4f
      Ard Biesheuvel authored
      
      
      The original ARM-only ioremap flavor 'ioremap_cached' has been renamed
      to 'ioremap_cache' to align with other architectures, and subsequently
      abused in generic code to map things like firmware tables in memory.
      For that reason, there is currently an effort underway to deprecate
      ioremap_cache, whose semantics are poorly defined, and which is typed
      with an __iomem annotation that is inappropriate for mappings of ordinary
      memory.
      
      However, original users of ioremap_cached() used it in a context where
      the I/O connotation is appropriate, and replacing those instances with
      memremap() does not make sense. So let's revive ioremap_cached(), so
      that we can change back those original users before we drop ioremap_cache
      entirely in favor of memremap.
      
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Acked-by: default avatarDan Williams <dan.j.williams@intel.com>
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      20c5ea4f
  12. 03 Jul, 2015 1 commit
  13. 01 Jun, 2015 1 commit
  14. 29 Jun, 2014 1 commit
  15. 01 Jun, 2014 1 commit
  16. 14 Nov, 2013 1 commit
    • Russell King's avatar
      ARM: Fix nommu.c build warning · 83651bb9
      Russell King authored
      
      
      The 0-day kernel build robot found this new warning:
      
      arch/arm/mm/nommu.c:303:17: warning: 'struct proc_info_list' declared inside parameter list [enabled by default]
      arch/arm/mm/nommu.c:303:17: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
      
      Fix it by including the appropriate header.
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      83651bb9
  17. 07 Nov, 2013 1 commit
  18. 26 Jul, 2013 1 commit
    • Russell King's avatar
      ARM: constify machine_desc structure uses · ff69a4c8
      Russell King authored
      
      
      struct machine_desc records are defined everywhere as a 'const'
      structure, but unfortuantely it loses its const-ness through the use of
      linker magic - the symbols which surround the section are not declared
      const so it becomes possible not to use 'const' for pointers to these
      const structures.
      
      Let's fix this oversight - all pointers to these structures should be
      marked const too.
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      ff69a4c8
  19. 24 Jun, 2013 1 commit
  20. 07 Jun, 2013 2 commits
    • Jonathan Austin's avatar
      ARM: mpu: Complete initialisation of the MPU after reaching the C-world · 9a271567
      Jonathan Austin authored
      
      
      Much like with the MMU, MPU initialisation is performed in two stages; the
      first in the pre-C world and the 'real' initialisation during arch setup.
      
      This patch wires in previously added MPU initialisation functions so that
      the whole of memory is mapped with the appropriate region properties for
      'normal' RAM (the appropriate properties depend on whether the system is
      SMP).
      
      Stub initialisation functions are added for the case that there MPU support
      is not configured in to the kernel.
      Signed-off-by: default avatarJonathan Austin <jonathan.austin@arm.com>
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      CC: Hyok S. Choi <hyok.choi@samsung.com>
      9a271567
    • Jonathan Austin's avatar
      ARM: mpu: add MPU probe and initialisation functions in C · 5ad7dcbe
      Jonathan Austin authored
      
      
      This patch adds new functions for probing and initialising the ARMv7
      PMSA-compliant MPU.
      
      These use the pre-defined and reserved MPU_PROBE_REGION for establishing
      properties of the MPU, which is necessary because certain probe operations
      require modifying region properties and reading back the results.
      
      This patch also introduces a minimal sanity_check_meminfo_mpu function, that
      ensures that the memory set-up passed to the kernel can be used in conjunction
      with the MPU. The base address of a region must be aligned to the region size,
      otherwise behavior is unpredictable and region sizes can only be specified as a
      power-of-two. To simplify the satisfaction of these requirements this
      implementation currently enforces that all memory is contiguous from
      PHYS_OFFSET, merging banks that are contiguous but passed in separately.
      
      The functions are added in this patch but wired in to the boot process later
      in the series.
      Signed-off-by: default avatarJonathan Austin <jonathan.austin@arm.com>
      Reviewed-by: default avatarWill Deacon <will.deacon@arm.com>
      CC: Hyok S. Choi <hyok.choi@samsung.com>
      5ad7dcbe
  21. 22 May, 2013 1 commit
  22. 17 Apr, 2013 1 commit
  23. 13 Apr, 2012 1 commit
  24. 11 Mar, 2012 1 commit
    • Rob Herring's avatar
      ARM: fix ioremap/iounmap for !CONFIG_MMU · 8a2b6255
      Rob Herring authored
      With commit 4fe7ef3a
      
       (ARM: provide runtime hook for ioremap/iounmap),
      compiles with !CONFIG_MMU were broken. Rename nommu __iounmap to
      __arm_iounmap and add arch_ioremap_caller and arch_iounmap. Its
      not expected that these need to be overriden for !CONFIG_MMU, so setting
      the function ptrs has no effect in this case.
      Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      8a2b6255
  25. 18 Nov, 2011 1 commit
  26. 10 Nov, 2011 1 commit
  27. 05 Jul, 2011 1 commit
  28. 27 Jul, 2010 2 commits
  29. 16 Jul, 2010 2 commits
  30. 08 May, 2010 2 commits
  31. 15 Feb, 2010 1 commit
  32. 14 Dec, 2009 1 commit