From SAI datasheet:

CHMOD, configures if transmit data pins are configured for TDM mode
or Output mode.
	* (0) TDM mode, transmit data pins are tri-stated when slots are
	masked or channels are disabled.
	* (1) Output mode, transmit data pins are never tri-stated and
	will output zero when slots are masked or channels are disabled.

When data pins are tri-stated, there is noise on some channels
when FS clock value is high and data is read while fsclk is
transitioning from high to low.

Fix this by setting CHMOD to Output Mode so that pins will output zero
when slots are masked or channels are disabled.

Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>

Commit 5a441aad ("iio: light: vcnl4000 add support for the VCNL4040
proximity and light sensor") added the support for the vcnl4040 but
forgot to add the of_compatible. Fix this by adding it now.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>

Since commit ebd457d5 ("iio: light: vcnl4000 add devicetree hooks")
the of_match_table is supported but the data shouldn't be a string.
Instead it shall be one of 'enum vcnl4000_device_ids'. Also the matching
logic for the vcnl4020 was wrong. Since the data retrieve mechanism is
still based on the i2c_device_id no failures did appeared till now.

Fixes: ebd457d5 ("iio: light: vcnl4000 add devicetree hooks")
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

magnetometer

The LSM9DS1 uses a high level interrupt.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Use the current battery voltage and an ocv table to provide
battery capacity information.

Signed-off-by: Guido Günther <agx@sigxcpu.org>

Add a simple-battery with default power capacity

Discharge curve comes from the panasonic NCR18650B datasheet

https://www.batteryspace.com/prod-specs/NCR18650B.pdf



Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

This is not currently needed, instead a platform device is always created
from SOC-specific code.

We can use of_machine_is_compatible for per-SOC behavior instead.

Suggested-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

Early samples without fuses written report "0 0" which means consumer
segment and minimum speed grading. According to datasheet the minimum speed
grade is not supported for consumer parts so all OPPs are disabled
which results in stack dumps later on.

Fix by clamping minimum consumer speed grade to 1 on imx8mm and imx8mq.

Fixes: 4d28ba1d ("cpufreq: Add imx-cpufreq-dt driver")

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
[ Viresh: s/minumum/minimum/ in patch and log ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

Using pm_qos results in (imx8mq) cpus never being able to reach
the cpu-sleep C-state, see https://lwn.net/Articles/384146/

 for
some background. The pm_qos API is very rarely used in general.

Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>

For imx8m we need a separate small driver to read "speed grading"
information from fuses and determine which OPPs are supported.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Right now in upstream imx8m cpufreq support just lists a common subset
of OPPs because the higher ones should only be attempted after checking
speed grading in fuses.

Add a small driver which checks speed grading from nvmem cells before
registering cpufreq-dt.

This driver allows unlocking all frequencies for imx8mm and imx8mq and
could be applied to other chips like imx7d

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

Add the cpu-sleep idle state with all the necessary parameters and also add
the cpu-idle-states to the cpu nodes.

The 'broken-wake-request-signals' property is used to let the irq-imx-gpcv2
driver know that the wake request signals from GIC are not linked to the
GPC at all and, therefore, the driver should  make use of the dedicated
workaround to explicitly wake up the target core on every IPI.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

Add nvmem-cells reference to cpu and fill the OPP table with all known
OPPs.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

i.MX8MQ is missing the wake_request signals from GIC to GPCv2. This indirectly
breaks cpuidle support due to inability to wake target cores on IPIs.

Here is the link to the errata (see e11171):

https://www.nxp.com/docs/en/errata/IMX8MDQLQ_0N14W.pdf



Now, in order to fix this, we can trigger IRQ 32 (hwirq 0) to all the cores by
setting 12th bit in IOMUX_GPR1 register. In order to control the target cores
only, that is, not waking up all the cores every time, we can unmask/mask the
IRQ 32 in the first GPC IMR register. So basically we can leave the IOMUX_GPR1
12th bit always set and just play with the masking and unmasking the IRO 32 for
each independent core.

Since EL3 is the one that deals with powering down/up the cores, and since the
cores wake up in EL3, EL3 should be the one to control the IMRs in this case.
This implies we need to get into EL3 on every IPI to do the unmasking, leaving
the masking to be done on the power-up sequence by the core itself.

In order to be able to get into EL3 on each IPI, we 'hijack' the registered smp
cross call handler, in this case the gic_raise_softirq which is registered by
the irq-gic-v3 driver and register our own handler instead. This new handler is
basically a wrapper over the hijacked handler plus the call into EL3.

To get into EL3, we use a custom vendor SIP id added just for this purpose.

All of this is conditional for i.MX8MQ only.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>

enable rfkill and cpuidle

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

There is a vcnl4040 light and proximity sensor on the board. Enable it.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Add a node for the snvs power key, "disabled" by default.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

The imx8mq is dependant on SOC_BUS which is dependant on CRYPTO_DEV_FSL_CAAM

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Enable the user input layer

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

To enable the diversity set the module parameter antenna_diversity=1

insmod rsi_91x.ko rsi_zone_enabled=1 dev_oper_mode=13 antenna_diversity=1

add the redpine module driver to the build

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Add the Purism driver for 9116 module

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Specify which regulator is used for cpufreq DVFS.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

The BroadMobi BM818 M.2 card uses the QMI protocol

Co-developed-by:  <bob.ham@puri.sm>
Signed-off-by:  <bob.ham@puri.sm>
Signed-off-by Angus Ainslie (Purism) <angus@akkea.ca>

Add a VID:PID for the BroadModi BM818 M.2 card

Co-developed-by:  <bob.ham@puri.sm>
Signed-off-by:  <bob.ham@puri.sm>
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Without a VBUS supply the dwc3 driver won't go into otg mode.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Need otg mode for usb networking

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Due to current spikes during boot the USB-C VBUS can get drawn down too
low causing the bq25890 to reset the board. Allow VBUS to drop a bit
further to make allowance for thses spikes.

Signed-off-by: Eric Kuzmenko <eric.kuzmenko@puri.sm>
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

The bq25890 has low voltage protection on VIN. Allow the register
to be set from the device tree.

Signed-off-by: Eric Kuzmenko <eric.kuzmenko@puri.sm>
Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Signed-off-by: Guido Günther <guido.gunther@puri.sm>

Signed-off-by: Guido Günther <guido.gunther@puri.sm>

Signed-off-by: Guido Günther <guido.gunther@puri.sm>

This uses

 - our nwl mipi dsi controller driver
 - our mixel dphy driver
 - a forward port from NXPs dcss driver from our 4.18 tree
   (which we got from their 4.9/4.14 trees)
 - a forward port NXPs patches to the imx-display-subsystem driver
   from our 4.18 tree (which we got from their 4.9/4.14 trees)