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    MIPS: ralink: Fix booting on MT7621 · a63d706e
    NeilBrown authored
    Since commit 3af5a67c ("MIPS: Fix early CM probing") the MT7621 has
    not been able to boot.
    
    This commit caused mips_cm_probe() to be called before
    mt7621.c::proc_soc_init().
    
    prom_soc_init() has a comment explaining that mips_cm_probe() "wipes out
    the bootloader config" and means that configuration registers are no
    longer available. It has some code to re-enable this config.
    
    Before this re-enable code is run, the sysc register cannot be read, so
    when SYSC_REG_CHIP_NAME0 is read, a garbage value is returned and
    panic() is called.
    
    If we move the config-repair code to the top of prom_soc_init(), the
    registers can be read and boot can proceed.
    
    Very occasionally, the first register read after the reconfiguration
    returns garbage, so add a call to __sync().
    
    Fixes: 3af5a67c
    
     ("MIPS: Fix early CM probing")
    Signed-off-by: default avatarNeilBrown <neil@brown.name>
    Reviewed-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
    Cc: John Crispin <john@phrozen.org>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: linux-mips@linux-mips.org
    Cc: <stable@vger.kernel.org> # 4.5+
    Patchwork: https://patchwork.linux-mips.org/patch/18859/
    
    
    Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
    a63d706e