Commit 2d1393ef authored by Marek Vasut's avatar Marek Vasut
Browse files

rcar_gen3: drivers: qos: D3: Configure DBSC QoS from a table



Convert the DBSC QoS setting function to a simple table of register-value
pairs and pass it to common rcar_qos_dbsc_setting() to write those values
to matching registers.
Signed-off-by: default avatarMarek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I81b48475114fc293766a6d7f2b46f8e913a51b06
parent be5d6079
...@@ -16,54 +16,47 @@ ...@@ -16,54 +16,47 @@
#include "qos_init_d3_mstat.h" #include "qos_init_d3_mstat.h"
static void dbsc_setting(void) struct rcar_gen3_dbsc_qos_settings d3_qos[] = {
{
/* Register write enable */
io_write_32(DBSC_DBSYSCNT0, 0x00001234U);
/* BUFCAM settings */ /* BUFCAM settings */
io_write_32(DBSC_DBCAM0CNF1, 0x00043218); { DBSC_DBCAM0CNF1, 0x00043218 },
io_write_32(DBSC_DBCAM0CNF2, 0x000000F4); { DBSC_DBCAM0CNF2, 0x000000F4 },
io_write_32(DBSC_DBSCHCNT0, 0x000F0037); { DBSC_DBSCHCNT0, 0x000F0037 },
io_write_32(DBSC_DBSCHSZ0, 0x00000001); { DBSC_DBSCHSZ0, 0x00000001 },
io_write_32(DBSC_DBSCHRW0, 0x22421111); { DBSC_DBSCHRW0, 0x22421111 },
/* DDR3 */ /* DDR3 */
io_write_32(DBSC_SCFCTST2, 0x012F1123); { DBSC_SCFCTST2, 0x012F1123 },
/* QoS Settings */ /* QoS Settings */
io_write_32(DBSC_DBSCHQOS00, 0x00000F00); { DBSC_DBSCHQOS00, 0x00000F00 },
io_write_32(DBSC_DBSCHQOS01, 0x00000B00); { DBSC_DBSCHQOS01, 0x00000B00 },
io_write_32(DBSC_DBSCHQOS02, 0x00000000); { DBSC_DBSCHQOS02, 0x00000000 },
io_write_32(DBSC_DBSCHQOS03, 0x00000000); { DBSC_DBSCHQOS03, 0x00000000 },
io_write_32(DBSC_DBSCHQOS40, 0x00000300); { DBSC_DBSCHQOS40, 0x00000300 },
io_write_32(DBSC_DBSCHQOS41, 0x000002F0); { DBSC_DBSCHQOS41, 0x000002F0 },
io_write_32(DBSC_DBSCHQOS42, 0x00000200); { DBSC_DBSCHQOS42, 0x00000200 },
io_write_32(DBSC_DBSCHQOS43, 0x00000100); { DBSC_DBSCHQOS43, 0x00000100 },
io_write_32(DBSC_DBSCHQOS90, 0x00000300); { DBSC_DBSCHQOS90, 0x00000300 },
io_write_32(DBSC_DBSCHQOS91, 0x000002F0); { DBSC_DBSCHQOS91, 0x000002F0 },
io_write_32(DBSC_DBSCHQOS92, 0x00000200); { DBSC_DBSCHQOS92, 0x00000200 },
io_write_32(DBSC_DBSCHQOS93, 0x00000100); { DBSC_DBSCHQOS93, 0x00000100 },
io_write_32(DBSC_DBSCHQOS130, 0x00000100); { DBSC_DBSCHQOS130, 0x00000100 },
io_write_32(DBSC_DBSCHQOS131, 0x000000F0); { DBSC_DBSCHQOS131, 0x000000F0 },
io_write_32(DBSC_DBSCHQOS132, 0x000000A0); { DBSC_DBSCHQOS132, 0x000000A0 },
io_write_32(DBSC_DBSCHQOS133, 0x00000040); { DBSC_DBSCHQOS133, 0x00000040 },
io_write_32(DBSC_DBSCHQOS140, 0x000000C0); { DBSC_DBSCHQOS140, 0x000000C0 },
io_write_32(DBSC_DBSCHQOS141, 0x000000B0); { DBSC_DBSCHQOS141, 0x000000B0 },
io_write_32(DBSC_DBSCHQOS142, 0x00000080); { DBSC_DBSCHQOS142, 0x00000080 },
io_write_32(DBSC_DBSCHQOS143, 0x00000040); { DBSC_DBSCHQOS143, 0x00000040 },
io_write_32(DBSC_DBSCHQOS150, 0x00000040); { DBSC_DBSCHQOS150, 0x00000040 },
io_write_32(DBSC_DBSCHQOS151, 0x00000030); { DBSC_DBSCHQOS151, 0x00000030 },
io_write_32(DBSC_DBSCHQOS152, 0x00000020); { DBSC_DBSCHQOS152, 0x00000020 },
io_write_32(DBSC_DBSCHQOS153, 0x00000010); { DBSC_DBSCHQOS153, 0x00000010 },
};
/* Register write protect */
io_write_32(DBSC_DBSYSCNT0, 0x00000000U);
}
void qos_init_d3(void) void qos_init_d3(void)
{ {
dbsc_setting(); rcar_qos_dbsc_setting(d3_qos, ARRAY_SIZE(d3_qos), true);
/* DRAM Split Address mapping */ /* DRAM Split Address mapping */
#if RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH #if RCAR_DRAM_SPLIT == RCAR_DRAM_SPLIT_4CH
......
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