1. 17 Jun, 2019 1 commit
  2. 12 Jun, 2019 1 commit
  3. 10 Jun, 2019 1 commit
  4. 06 Jun, 2019 2 commits
  5. 03 Jun, 2019 1 commit
  6. 31 May, 2019 1 commit
  7. 30 May, 2019 2 commits
  8. 28 May, 2019 2 commits
  9. 24 May, 2019 3 commits
    • Alexei Fedorov's avatar
      Add support for Branch Target Identification · 9fc59639
      Alexei Fedorov authored
      This patch adds the functionality needed for platforms to provide
      Branch Target Identification (BTI) extension, introduced to AArch64
      in Armv8.5-A by adding BTI instruction used to mark valid targets
      for indirect branches. The patch sets new GP bit [50] to the stage 1
      Translation Table Block and Page entries to denote guarded EL3 code
      pages which will cause processor to trap instructions in protected
      pages trying to perform an indirect branch to any instruction other
      than BTI.
      BTI feature is selected by BRANCH_PROTECTION option which supersedes
      the previous ENABLE_PAUTH used for Armv8.3-A Pointer Authentication
      and is disabled by default. Enabling BTI requires compiler support
      and was tested with GCC versions 9.0.0, 9.0.1 and 10.0.0.
      The assembly macros and helpers are modified to accommodate the BTI
      instruction.
      This is an experimental feature.
      Note. The previous ENABLE_PAUTH build option to enable PAuth in EL3
      is now made as an internal flag and BRANCH_PROTECTION flag should be
      used instead to enable Pointer Authentication.
      Note. USE_LIBROM=1 option is currently not supported.
      
      Change-Id: Ifaf4438609b16647dc79468b70cd1f47a623362e
      Signed-off-by: default avatarAlexei Fedorov <Alexei.Fedorov@arm.com>
      9fc59639
    • John Tsichritzis's avatar
      Docs fixes · a16fd37f
      John Tsichritzis authored
      1) Fix links in "about" page
      2) Put back the "contents" page with adjusted links
      
      Change-Id: Id09140b91df5cf0a275149801d05d8cfeeda1c6e
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      a16fd37f
    • John Tsichritzis's avatar
      Update security documentation · 55f14059
      John Tsichritzis authored
      1) Replace references to "Arm Trusted Firmware" with "TF-A"
      2) Update issue tracker link
      
      Change-Id: I12d827d49f6cc34e46936d7f7ccf44e32b26a0bd
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      55f14059
  10. 22 May, 2019 10 commits
    • Paul Beesley's avatar
      doc: Use proper note and warning annotations · e1c5026a
      Paul Beesley authored
      The documentation contains plenty of notes and warnings. Enable
      special rendering of these blocks by converting the note prefix
      into a .. note:: annotation.
      
      Change-Id: I34e26ca6bf313d335672ab6c2645741900338822
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      e1c5026a
    • Paul Beesley's avatar
      doc: Refactor contributor acknowledgements · f94102ba
      Paul Beesley authored
      - Make the list of contributors into an actual list
      - Use note syntax for the note
      - Remove the Individuals heading since there are none
      
      This file could be considered for removal as it is a legacy
      document, as its note explains.
      
      Change-Id: Idf984bc192af7a0ec367a6642ab99ccccf5df1a8
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      f94102ba
    • Paul Beesley's avatar
      doc: Reorganise images and update links · a2c320a8
      Paul Beesley authored
      Change-Id: I679d1499376a524bef1cfc33df995b0a719b5ac8
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      a2c320a8
    • Paul Beesley's avatar
      doc: Set correct syntax highlighting style · 29c02529
      Paul Beesley authored
      Several code blocks do not specify a language for syntax
      highlighting. This results in Sphinx using a default highlighter
      which is Python.
      
      This patch adds the correct language to each code block that doesn't
      already specify it.
      
      Change-Id: Icce1949aabfdc11a334a42d49edf55fa673cddc3
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      29c02529
    • Paul Beesley's avatar
      doc: Add minimal glossary · 8f62ca7b
      Paul Beesley authored
      One of the current issues with the documentation is that terms and
      abbreviations are frequently redefined. For example, we might have
      a sentence like "... the SCP (System Control Processor) will ...".
      
      These definitions might be repeated several times across pages, or
      even within the same document. Equally, some of these abbreviations
      are missed and are never expanded.
      
      Sphinx provides a :term: keyword that takes some text and,
      if that text is defined in a glossary document, links to its glossary
      entry. Using this functionality will prevent repeated definitions
      and will make the docs more maintainable by using a single
      definition source.
      
      The glossary added in this patch was created from a quick scrub of
      the source code - there may be missing entries. The SDEI abbreviation
      was used as an example.
      
      Note that a global_substitutions file was created. This file contains
      the RST 'replace' statements that convert plain text terms into linked
      terms (by adding the ':term:' keyword to them). An example is:
      
      .. |TF-A| replace:: :term:`TF-A`
      
      The 'rst_prolog' variable in conf.py is used to inject this list of
      replacements into each page. Terms must be surrounded with the pipe
      character to be turned into links - this means that we can still
      prevent certain terms from being linked if we don't want them to be.
      
      Change-Id: I87010ed9cfa4a60011a9b4a431b98cb4bb7baa28
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      8f62ca7b
    • Paul Beesley's avatar
      doc: Remove per-page contents lists · 57354abb
      Paul Beesley authored
      These are no longer needed as there will always be a table of contents
      rendered to the left of every page.
      
      Some of these lists can be quite long and, when opening a page, the
      reader sees nothing but a huge list of contents! After this patch,
      the document contents are front-and-centre and the contents are
      nicely rendered in the sidebar without duplication.
      
      Change-Id: I444754d548ec91d00f2b04e861de8dde8856aa62
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      57354abb
    • Paul Beesley's avatar
      doc: Format security advisory titles and headings · 267f8085
      Paul Beesley authored
      Required so that the advisory documents are all valid RST files (with a
      header) and that they all integrate into the document tree.
      
      Change-Id: I68ca2b0b9e648e24b460deb772c471a38518da26
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      267f8085
    • Paul Beesley's avatar
      doc: Reformat platform port documents · 24dba2b3
      Paul Beesley authored
      The platform port documents are not very standardised right now and
      they don't integrate properly into the document tree so:
      
      1) Make sure each port has a proper name and title (incl. owner)
      2) Correct use of headings, subheadings, etc in each port
      3) Resolve any naming conflicts between documents
      
      Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      24dba2b3
    • Paul Beesley's avatar
      doc: Normalise section numbering and headings · 83993177
      Paul Beesley authored
      Required work to make all documents sit at the correct levels within
      the document tree and any derived content like the table of contents
      and the categories in the sidebar.
      
      Change-Id: I4885fbe30864a87c8822ee67482b71fb46a8fbc6
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      83993177
    • Paul Beesley's avatar
      doc: Reword document titles · 8aa05055
      Paul Beesley authored
      This patch attempts to standardise the document titles as well as
      adding titles to documents that were missing one. The aim is to
      remove needless references to "TF-A" or "Trusted Firmware" in the
      title of every document and to make sure that the title matches
      with the document content.
      
      Change-Id: I9b93ccf43b5d57e8dc793a5311b8ed7c4dd245cc
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      8aa05055
  11. 21 May, 2019 4 commits
    • Paul Beesley's avatar
      doc: Move content out of readme and create new index page · 9f1622b0
      Paul Beesley authored
      Previously the readme.rst file served as the entrypoint for the
      documentation. With a Sphinx build the top-level document is set
      to be index.rst as it contains the primary document index.
      
      This patch moves some content from readme.rst into index.rst and
      splits the license information out into license.rst.
      
      Change-Id: I5c50250b81136fe36aa9ceedaae302b44ec11e47
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      9f1622b0
    • Paul Beesley's avatar
      doc: Move documents into subdirectories · 40d553cf
      Paul Beesley authored
      This change creates the following directories under docs/
      in order to provide a grouping for the content:
      
      - components
      - design
      - getting_started
      - perf
      - process
      
      In each of these directories an index.rst file is created
      and this serves as an index / landing page for each of the
      groups when the pages are compiled. Proper layout of the
      top-level table of contents relies on this directory/index
      structure.
      
      Without this patch it is possible to build the documents
      correctly with Sphinx but the output looks messy because
      there is no overall hierarchy.
      
      Change-Id: I3c9f4443ec98571a56a6edf775f2c8d74d7f429f
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      40d553cf
    • Paul Beesley's avatar
      doc: Add minimal Sphinx support · 653279b0
      Paul Beesley authored
      Add the essentials for supporting a Sphinx documentation build:
      
      - A makefile under docs/ to invoke Sphinx with the desired output
        format
      - A Sphinx master configuration file (conf.py)
      - A single, top-level index page (index.rst)
      - The TF.org logo that is integrated in the the sidebar of the
        rendered output
      
      Change-Id: I85e67e939658638337ca7972936a354878083a25
      Signed-off-by: default avatarPaul Beesley <paul.beesley@arm.com>
      653279b0
    • John Tsichritzis's avatar
      Fix docs references to header files · ce8dc187
      John Tsichritzis authored
      Change-Id: I5c06e777d93ac653a853997c2b7c1c9d09b1e49c
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      ce8dc187
  12. 20 May, 2019 1 commit
  13. 10 May, 2019 1 commit
  14. 08 May, 2019 1 commit
  15. 07 May, 2019 1 commit
  16. 03 May, 2019 1 commit
    • John Tsichritzis's avatar
      Add compile-time errors for HW_ASSISTED_COHERENCY flag · 076b5f02
      John Tsichritzis authored
      This patch fixes this issue:
      https://github.com/ARM-software/tf-issues/issues/660
      
      The introduced changes are the following:
      
      1) Some cores implement cache coherency maintenance operation on the
      hardware level. For those cores, such as - but not only - the DynamIQ
      cores, it is mandatory that TF-A is compiled with the
      HW_ASSISTED_COHERENCY flag. If not, the core behaviour at runtime is
      unpredictable. To prevent this, compile time checks have been added and
      compilation errors are generated, if needed.
      
      2) To enable this change for FVP, a logical separation has been done for
      the core libraries. A system cannot contain cores of both groups, i.e.
      cores that manage coherency on hardware and cores that don't do it. As
      such, depending on the HW_ASSISTED_COHERENCY flag, FVP includes the
      libraries only of the relevant cores.
      
      3) The neoverse_e1.S file has been added to the FVP sources.
      
      Change-Id: I787d15819b2add4ec0d238249e04bf0497dc12f3
      Signed-off-by: default avatarJohn Tsichritzis <john.tsichritzis@arm.com>
      076b5f02
  17. 02 May, 2019 1 commit
    • Christoph Müllner's avatar
      build_macros: Add mechanism to prevent bin generation. · 9e4609f1
      Christoph Müllner authored
      On certain platforms it does not make sense to generate
      TF-A binary images. For example a platform could make use of serveral
      memory areas, which are non-continuous and the resulting binary
      therefore would suffer from the padding-bytes.
      Typically these platforms use the ELF image.
      
      This patch introduces a variable DISABLE_BIN_GENERATION, which
      can be set to '1' in the platform makefile to prevent the binary
      generation.
      Signed-off-by: default avatarChristoph Müllner <christophm30@gmail.com>
      Change-Id: I62948e88bab685bb055fe6167d9660d14e604462
      9e4609f1
  18. 30 Apr, 2019 1 commit
    • Louis Mayencourt's avatar
      Add support for default stack-protector flag · fd7b287c
      Louis Mayencourt authored
      The current stack-protector support is for none, "strong" or "all".
      The default use of the flag enables the stack-protection to all
      functions that declare a character array of eight bytes or more in
      length on their stack.
      This option can be tuned with the --param=ssp-buffer-size=N option.
      
      Change-Id: I11ad9568187d58de1b962b8ae04edd1dc8578fb0
      Signed-off-by: default avatarLouis Mayencourt <louis.mayencourt@arm.com>
      fd7b287c
  19. 26 Apr, 2019 1 commit
  20. 25 Apr, 2019 2 commits
  21. 23 Apr, 2019 1 commit
    • Yann Gautier's avatar
      stm32mp1: add OP-TEE support · 1989a19c
      Yann Gautier authored
      Support booting OP-TEE as BL32 boot stage and secure runtime
      service.
      
      OP-TEE executes in internal RAM and uses a secure DDR area to store
      the pager pagestore. Memory mapping and TZC are configured accordingly
      prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where
      a header file describes the effective boot images. This change
      post processes header file content to get OP-TEE load addresses
      and set OP-TEE boot arguments.
      
      Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44
      Signed-off-by: default avatarYann Gautier <yann.gautier@st.com>
      Signed-off-by: default avatarEtienne Carriere <etienne.carriere@st.com>
      1989a19c
  22. 18 Apr, 2019 1 commit