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Peng Fan authored
The MIB RAM and FIFO receive start register does not exist on i.MX6ULL. Accessing these register will cause enet not work well or cause system report fault. Reported-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 5fb09cab9bb3cc4cef02239299d02cec666396ab)
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