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  • Simon Glass's avatar
    x86: Add TSC timer · e761ecdb
    Simon Glass authored
    
    
    This timer runs at a rate that can be calculated, well over 100MHz. It is
    ideal for accurate timing and does not need interrupt servicing.
    
    Tidy up some old broken and unneeded implementations at the same time.
    
    To provide a consistent view of boot time, we use the same time
    base as coreboot. Use the base timestamp supplied by coreboot
    as U-Boot's base time.
    
    Signed-off-by: default avatarSimon Glass <sjg@chromium.org&gt;base>
    Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
    e761ecdb