Commit 00f892fc authored by Macpaul Lin's avatar Macpaul Lin Committed by Wolfgang Denk
Browse files

nds32: add header files support for nds32



Add generic header files support for nds32 architecture.
Cache, ptregs, data type and other definitions are included.
Signed-off-by: default avatarMacpaul Lin <macpaul@andestech.com>
parent 0c277ef9
/*
* Copyright 1995, Russell King.
* Various bits and pieces copyrights include:
* Linus Torvalds (test_bit).
*
* Copyright (C) 2011 Andes Technology Corporation
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
*
* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
*
* Please note that the code in this file should never be included
* from user space. Many of these are not implemented in assembler
* since they would be too costly. Also, they require priviledged
* instructions (which are not available from user mode) to ensure
* that they are atomic.
*/
#ifndef __ASM_NDS_BITOPS_H
#define __ASM_NDS_BITOPS_H
#ifdef __KERNEL__
#include <asm/system.h>
#define smp_mb__before_clear_bit() do { } while (0)
#define smp_mb__after_clear_bit() do { } while (0)
/*
* Function prototypes to keep gcc -Wall happy.
*/
extern void set_bit(int nr, void *addr);
static inline void __set_bit(int nr, void *addr)
{
int *a = (int *)addr;
int mask;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
*a |= mask;
}
extern void clear_bit(int nr, void *addr);
static inline void __clear_bit(int nr, void *addr)
{
int *a = (int *)addr;
int mask;
unsigned long flags;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
local_irq_save(flags);
*a &= ~mask;
local_irq_restore(flags);
}
extern void change_bit(int nr, void *addr);
static inline void __change_bit(int nr, void *addr)
{
int mask;
unsigned long *ADDR = (unsigned long *)addr;
ADDR += nr >> 5;
mask = 1 << (nr & 31);
*ADDR ^= mask;
}
extern int test_and_set_bit(int nr, void *addr);
static inline int __test_and_set_bit(int nr, void *addr)
{
int mask, retval;
unsigned int *a = (unsigned int *)addr;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
retval = (mask & *a) != 0;
*a |= mask;
return retval;
}
extern int test_and_clear_bit(int nr, void *addr);
static inline int __test_and_clear_bit(int nr, void *addr)
{
int mask, retval;
unsigned int *a = (unsigned int *)addr;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
retval = (mask & *a) != 0;
*a &= ~mask;
return retval;
}
extern int test_and_change_bit(int nr, void *addr);
static inline int __test_and_change_bit(int nr, void *addr)
{
int mask, retval;
unsigned int *a = (unsigned int *)addr;
a += nr >> 5;
mask = 1 << (nr & 0x1f);
retval = (mask & *a) != 0;
*a ^= mask;
return retval;
}
extern int find_first_zero_bit(void *addr, unsigned size);
extern int find_next_zero_bit(void *addr, int size, int offset);
/*
* This routine doesn't need to be atomic.
*/
static inline int test_bit(int nr, const void *addr)
{
return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7));
}
/*
* ffz = Find First Zero in word. Undefined if no zero exists,
* so code should check against ~0UL first..
*/
static inline unsigned long ffz(unsigned long word)
{
int k;
word = ~word;
k = 31;
if (word & 0x0000ffff) {
k -= 16; word <<= 16;
}
if (word & 0x00ff0000) {
k -= 8; word <<= 8;
}
if (word & 0x0f000000) {
k -= 4; word <<= 4;
}
if (word & 0x30000000) {
k -= 2; word <<= 2;
}
if (word & 0x40000000)
k -= 1;
return k;
}
/*
* ffs: find first bit set. This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
/*
* redefined in include/linux/bitops.h
* #define ffs(x) generic_ffs(x)
*/
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
#define hweight32(x) generic_hweight32(x)
#define hweight16(x) generic_hweight16(x)
#define hweight8(x) generic_hweight8(x)
#define ext2_set_bit test_and_set_bit
#define ext2_clear_bit test_and_clear_bit
#define ext2_test_bit test_bit
#define ext2_find_first_zero_bit find_first_zero_bit
#define ext2_find_next_zero_bit find_next_zero_bit
/* Bitmap functions for the minix filesystem. */
#define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
#define minix_set_bit(nr, addr) set_bit(nr, addr)
#define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
#define minix_test_bit(nr, addr) test_bit(nr, addr)
#define minix_find_first_zero_bit(addr, size) find_first_zero_bit(addr, size)
#endif /* __KERNEL__ */
#endif /* __ASM_NDS_BITOPS_H */
/*
* linux/include/asm-arm/byteorder.h
*
* Copyright (C) 2011 Andes Technology Corporation
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
*
* ARM Endian-ness. In little endian mode, the data bus is connected such
* that byte accesses appear as:
* 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
* and word accesses (data or instruction) appear as:
* d0...d31
*
* When in big endian mode, byte accesses appear as:
* 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
* and word accesses (data or instruction) appear as:
* d0...d31
*/
#ifndef __ASM_NDS_BYTEORDER_H
#define __ASM_NDS_BYTEORDER_H
#include <asm/types.h>
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __BYTEORDER_HAS_U64__
# define __SWAB_64_THRU_32__
#endif
#ifdef __NDSEB__
#include <linux/byteorder/big_endian.h>
#else
#include <linux/byteorder/little_endian.h>
#endif
#endif
/*
* Copyright (C) 2011 Andes Technology Corporation
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _ASM_CACHE_H
#define _ASM_CACHE_H
/* cache */
int icache_status(void);
void icache_enable(void);
void icache_disable(void);
int dcache_status(void);
void dcache_enable(void);
void dcache_disable(void);
#define DEFINE_GET_SYS_REG(reg) \
static inline unsigned long GET_##reg(void) \
{ \
unsigned long val; \
__asm__ volatile ( \
"mfsr %0, $"#reg : "=&r" (val) : : "memory" \
); \
return val; \
}
enum cache_t {ICACHE, DCACHE};
DEFINE_GET_SYS_REG(ICM_CFG);
DEFINE_GET_SYS_REG(DCM_CFG);
#define ICM_CFG_OFF_ISZ 6 /* I-cache line size */
#define ICM_CFG_MSK_ISZ (0x7UL << ICM_CFG_OFF_ISZ)
#define DCM_CFG_OFF_DSZ 6 /* D-cache line size */
#define DCM_CFG_MSK_DSZ (0x7UL << DCM_CFG_OFF_DSZ)
#endif /* _ASM_CACHE_H */
/*
* Copyright (C) 2011 Andes Technology Corporation
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
#define CONFIG_NEEDS_MANUAL_RELOC
#endif
/*
* (C) Copyright 2002
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Copyright (C) 2011 Andes Technology Corporation
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/**************************************************************
* CAUTION:
* - do not implement for NDS32 Arch yet.
* - so far no one uses the macros defined in this head file.
**************************************************************/
#ifndef __ASM_GBL_DATA_H
#define __ASM_GBL_DATA_H
/*
* The following data structure is placed in some memory wich is
* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
* some locked parts of the data cache) to allow for a minimum set of
* global variables during system initialization (until we have set
* up the memory controller so that we can use RAM).
*
* Keep it *SMALL* and remember to set CONFIG_GBL_DATA_SIZE > sizeof(gd_t)
*/
typedef struct global_data {
bd_t *bd;
unsigned long flags;
unsigned long baudrate;
unsigned long have_console; /* serial_init() was called */
unsigned long reloc_off; /* Relocation Offset */
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
unsigned long fb_base; /* base address of frame buffer */
unsigned long relocaddr; /* Start address of U-Boot in RAM */
phys_size_t ram_size; /* RAM size */
unsigned long mon_len; /* monitor len */
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
unsigned long tlb_addr;
#endif
void **jt; /* jump table */
char env_buf[32]; /* buffer for getenv() before reloc. */
} gd_t;
/*
* Global Data Flags
*/
#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
#define GD_FLG_SILENT 0x00004 /* Silent mode */
#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
#define GD_FLG_ENV_READY 0x00080 /* Envs imported into hash table */
#ifdef CONFIG_GLOBAL_DATA_NOT_REG10
extern volatile gd_t g_gd;
#define DECLARE_GLOBAL_DATA_PTR static volatile gd_t *gd = &g_gd
#else
#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("$r10")
#endif
#endif /* __ASM_GBL_DATA_H */
/*
* linux/include/asm-nds/io.h
*
* Copyright (C) 1996-2000 Russell King
*
* Copyright (C) 2011 Andes Technology Corporation
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
* constant addresses and variable addresses.
* 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
* specific IO header files.
* 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
* 04-Apr-1999 PJB Added check_signature.
* 12-Dec-1999 RMK More cleanups
* 18-Jun-2000 RMK Removed virt_to_* and friends definitions
*/
#ifndef __ASM_NDS_IO_H
#define __ASM_NDS_IO_H
/*
* CAUTION:
* - do not implement for NDS32 Arch yet.
* - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
* iinclude asm/io.h
*/
#ifdef __KERNEL__
#include <linux/types.h>
#include <asm/byteorder.h>
static inline void sync(void)
{
}
/*
* Given a physical address and a length, return a virtual address
* that can be used to access the memory range with the caching
* properties specified by "flags".
*/
#define MAP_NOCACHE (0)
#define MAP_WRCOMBINE (0)
#define MAP_WRBACK (0)
#define MAP_WRTHROUGH (0)
static inline void *
map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
{
return (void *)paddr;
}
/*
* Take down a mapping set up by map_physmem().
*/
static inline void unmap_physmem(void *vaddr, unsigned long flags)
{
}
static inline phys_addr_t virt_to_phys(void *vaddr)
{
return (phys_addr_t)(vaddr);
}
/*
* Generic virtual read/write. Note that we don't support half-word
* read/writes. We define __arch_*[bl] here, and leave __arch_*w
* to the architecture specific code.
*/
#define __arch_getb(a) (*(unsigned char *)(a))
#define __arch_getw(a) (*(unsigned short *)(a))
#define __arch_getl(a) (*(unsigned int *)(a))
#define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
#define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
#define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
extern void __raw_readsl(unsigned int addr, void *data, int longlen);
#define __raw_writeb(v, a) __arch_putb(v, a)
#define __raw_writew(v, a) __arch_putw(v, a)
#define __raw_writel(v, a) __arch_putl(v, a)
#define __raw_readb(a) __arch_getb(a)
#define __raw_readw(a) __arch_getw(a)
#define __raw_readl(a) __arch_getl(a)
#define writeb(v, a) __arch_putb(v, a)
#define writew(v, a) __arch_putw(v, a)
#define writel(v, a) __arch_putl(v, a)
#define readb(a) __arch_getb(a)
#define readw(a) __arch_getw(a)
#define readl(a) __arch_getl(a)
/*
* The compiler seems to be incapable of optimising constants
* properly. Spell it out to the compiler in some cases.
* These are only valid for small values of "off" (< 1<<12)
*/
#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
#define __raw_base_readb(base, off) __arch_base_getb(base, off)
#define __raw_base_readw(base, off) __arch_base_getw(base, off)
#define __raw_base_readl(base, off) __arch_base_getl(base, off)
/*
* Now, pick up the machine-defined IO definitions
* #include <asm/arch/io.h>
*/
/*
* IO port access primitives
* -------------------------
*
* The NDS32 doesn't have special IO access instructions just like ARM;
* all IO is memory mapped.
* Note that these are defined to perform little endian accesses
* only. Their primary purpose is to access PCI and ISA peripherals.
*
* Note that for a big endian machine, this implies that the following
* big endian mode connectivity is in place, as described by numerious
* ARM documents:
*
* PCI: D0-D7 D8-D15 D16-D23 D24-D31
* ARM: D24-D31 D16-D23 D8-D15 D0-D7
*
* The machine specific io.h include defines __io to translate an "IO"
* address to a memory address.
*
* Note that we prevent GCC re-ordering or caching values in expressions
* by introducing sequence points into the in*() definitions. Note that
* __raw_* do not guarantee this behaviour.
*
* The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
*/
#ifdef __io
#define outb(v, p) __raw_writeb(v, __io(p))
#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
#define outsb(p, d, l) writesb(__io(p), d, l)
#define outsw(p, d, l) writesw(__io(p), d, l)
#define outsl(p, d, l) writesl(__io(p), d, l)
#define insb(p, d, l) readsb(__io(p), d, l)
#define insw(p, d, l) readsw(__io(p), d, l)
#define insl(p, d, l) readsl(__io(p), d, l)
static inline void readsb(unsigned int *addr, void * data, int bytelen)
{
unsigned char *ptr = (unsigned char *)addr;
unsigned char *ptr2 = (unsigned char *)data;
while (bytelen) {
*ptr2 = *ptr;
ptr2++;
bytelen--;
}
}
static inline void readsw(unsigned int *addr, void * data, int wordlen)
{
unsigned short *ptr = (unsigned short *)addr;
unsigned short *ptr2 = (unsigned short *)data;
while (wordlen) {
*ptr2 = *ptr;
ptr2++;
wordlen--;
}
}
static inline void readsl(unsigned int *addr, void * data, int longlen)
{
unsigned int *ptr = (unsigned int *)addr;
unsigned int *ptr2 = (unsigned int *)data;
while (longlen) {
*ptr2 = *ptr;
ptr2++;
longlen--;
}
}
static inline void writesb(unsigned int *addr, const void * data, int bytelen)
{
unsigned char *ptr = (unsigned char *)addr;
unsigned char *ptr2 = (unsigned char *)data;
while (bytelen) {
*ptr = *ptr2;
ptr2++;
bytelen--;
}
}
static inline void writesw(unsigned int *addr, const void * data, int wordlen)
{
unsigned short *ptr = (unsigned short *)addr;
unsigned short *ptr2 = (unsigned short *)data;
while (wordlen) {
*ptr = *ptr2;
ptr2++;
wordlen--;
}
}
static inline void writesl(unsigned int *addr, const void * data, int longlen)
{
unsigned int *ptr = (unsigned int *)addr;
unsigned int *ptr2 = (unsigned int *)data;
while (longlen) {
*ptr = *ptr2;