Commit 0133502e authored by Matthias Fuchs's avatar Matthias Fuchs Committed by Wolfgang Denk

Improve configuration of FPGA subsystem

This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.

See README for the new options:

	CONFIG_FPGA,
	CONFIG_FPGA_<vendor>,
	CONFIG_FPGA_<family>
Signed-off-by: default avatarMatthias Fuchs <matthias.fuchs@esd-electronics.com>
parent 95c6bc7d
......@@ -1377,14 +1377,23 @@ The following options need to be configured:
SPI configuration items (port pins to use, etc). For
an example, see include/configs/sacsng.h.
- FPGA Support: CONFIG_FPGA_COUNT
- FPGA Support: CONFIG_FPGA
Specify the number of FPGA devices to support.
Enables FPGA subsystem.
CONFIG_FPGA_<vendor>
Enables support for specific chip vendors.
(ALTERA, XILINX)
CONFIG_FPGA
CONFIG_FPGA_<family>
Used to specify the types of FPGA devices. For example,
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
Enables support for FPGA family.
(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
CONFIG_FPGA_COUNT
Specify the number of FPGA devices to support.
CFG_FPGA_PROG_FEEDBACK
......
......@@ -34,7 +34,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if (CONFIG_FPGA)
#if defined(CONFIG_FPGA)
#if 0
#define GEN860T_FPGA_DEBUG
......
......@@ -254,7 +254,7 @@ int misc_init_r (void)
mii_init ();
#endif
#if (CONFIG_FPGA)
#if defined(CONFIG_FPGA)
gen860t_init_fpga ();
#endif
return 0;
......
......@@ -28,7 +28,7 @@
#include <common.h> /* core U-Boot definitions */
#include <ACEX1K.h> /* ACEX device family */
#if (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K))
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_ACEX1K)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
......@@ -363,4 +363,4 @@ static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
}
#endif /* (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K)) */
#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_ACEX1K */
......@@ -40,7 +40,7 @@
#define PRINTF(fmt,args...)
#endif
#if (CONFIG_FPGA & CFG_FPGA_ALTERA)
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
/* Local Static Functions */
static int altera_validate (Altera_desc * desc, char *fn);
......@@ -56,11 +56,11 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
switch (desc->family) {
case Altera_ACEX1K:
case Altera_CYC2:
#if (CONFIG_FPGA & CFG_ACEX1K)
#if defined(CONFIG_FPGA_ACEX1K)
PRINTF ("%s: Launching the ACEX1K Loader...\n",
__FUNCTION__);
ret_val = ACEX1K_load (desc, buf, bsize);
#elif (CONFIG_FPGA & CFG_CYCLON2)
#elif defined CONFIG_FPGA_CYCLON2
PRINTF ("%s: Launching the CYCLON II Loader...\n",
__FUNCTION__);
ret_val = CYC2_load (desc, buf, bsize);
......@@ -88,7 +88,7 @@ int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
} else {
switch (desc->family) {
case Altera_ACEX1K:
#if (CONFIG_FPGA & CFG_ACEX)
#if defined(CONFIG_FPGA_ACEX)
PRINTF ("%s: Launching the ACEX1K Reader...\n",
__FUNCTION__);
ret_val = ACEX1K_dump (desc, buf, bsize);
......@@ -156,9 +156,9 @@ int altera_info( Altera_desc *desc )
switch (desc->family) {
case Altera_ACEX1K:
case Altera_CYC2:
#if (CONFIG_FPGA & CFG_ACEX1K)
#if defined(CONFIG_FPGA_ACEX1K)
ACEX1K_info (desc);
#elif (CONFIG_FPGA & CFG_CYCLON2)
#elif defined(CONFIG_FPGA_CYCLON2)
CYC2_info (desc);
#else
/* just in case */
......@@ -192,7 +192,7 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
} else {
switch (desc->family) {
case Altera_ACEX1K:
#if (CONFIG_FPGA & CFG_ACEX1K)
#if defined(CONFIG_FPGA_ACEX1K)
ret_val = ACEX1K_reloc (desc, reloc_offset);
#else
printf ("%s: No support for ACEX devices.\n",
......@@ -200,7 +200,7 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
#endif
break;
case Altera_CYC2:
#if (CONFIG_FPGA & CFG_CYCLON2)
#if defined(CONFIG_FPGA_CYCLON2)
ret_val = CYC2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for CYCLON II devices.\n",
......@@ -249,4 +249,4 @@ static int altera_validate (Altera_desc * desc, char *fn)
/* ------------------------------------------------------------------------- */
#endif /* CONFIG_FPGA & CFG_FPGA_ALTERA */
#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */
......@@ -58,7 +58,7 @@ static int fpga_get_op (char *opstr);
/* Convert bitstream data and load into the fpga */
int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
{
#if (CONFIG_FPGA & CFG_FPGA_XILINX)
#if defined(CONFIG_FPGA_XILINX)
unsigned int length;
unsigned char* swapdata;
unsigned int swapsize;
......
......@@ -27,7 +27,7 @@
#include <altera.h>
#include <ACEX1K.h> /* ACEX device family */
#if (CONFIG_FPGA & (CFG_ALTERA | CFG_CYCLON2))
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_CYCLON2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
......@@ -302,4 +302,4 @@ static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
return ret_val;
}
#endif /* (CONFIG_FPGA & (CFG_ALTERA | CFG_CYCLON2)) */
#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_CYCLON2 */
......@@ -67,14 +67,11 @@ static int fpga_dev_info( int devnum );
static void fpga_no_sup( char *fn, char *msg )
{
if ( fn && msg ) {
printf( "%s: No support for %s. CONFIG_FPGA defined as 0x%x.\n",
fn, msg, CONFIG_FPGA );
printf( "%s: No support for %s.\n", fn, msg);
} else if ( msg ) {
printf( "No support for %s. CONFIG_FPGA defined as 0x%x.\n",
msg, CONFIG_FPGA );
printf( "No support for %s.\n", msg);
} else {
printf( "No FPGA suport! CONFIG_FPGA defined as 0x%x.\n",
CONFIG_FPGA );
printf( "No FPGA suport!\n");
}
}
......@@ -112,11 +109,6 @@ static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_va
printf( "%s: Null buffer.\n", fn );
return (fpga_desc * const)NULL;
}
if ( !bsize ) {
printf( "%s: Null buffer size.\n", fn );
return (fpga_desc * const)NULL;
}
return desc;
}
......@@ -135,7 +127,7 @@ static int fpga_dev_info( int devnum )
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
#if defined(CONFIG_FPGA_XILINX)
printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
ret_val = xilinx_info( desc->devdesc );
#else
......@@ -143,7 +135,7 @@ static int fpga_dev_info( int devnum )
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
#if defined(CONFIG_FPGA_ALTERA)
printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
ret_val = altera_info( desc->devdesc );
#else
......@@ -175,14 +167,14 @@ int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
switch ( devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
......@@ -268,14 +260,14 @@ int fpga_load( int devnum, void *buf, size_t bsize )
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
......@@ -301,14 +293,14 @@ int fpga_dump( int devnum, void *buf, size_t bsize )
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
#if CONFIG_FPGA & CFG_FPGA_XILINX
#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
#if CONFIG_FPGA & CFG_FPGA_ALTERA
#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
......
......@@ -25,7 +25,7 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan2.h> /* Spartan-II device family */
#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN2))
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
......
......@@ -30,7 +30,7 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan3.h> /* Spartan-II device family */
#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN3))
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN3)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
......
......@@ -31,7 +31,7 @@
#include <common.h>
#include <virtex2.h>
#if (CONFIG_FPGA & (CFG_XILINX | CFG_VIRTEX2))
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_VIRTEX2)
#if 0
#define FPGA_DEBUG
......
......@@ -32,7 +32,7 @@
#include <spartan2.h>
#include <spartan3.h>
#if (CONFIG_FPGA & CFG_FPGA_XILINX)
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
#if 0
#define FPGA_DEBUG
......@@ -59,7 +59,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
} else
switch (desc->family) {
case Xilinx_Spartan2:
#if (CONFIG_FPGA & CFG_SPARTAN2)
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Loader...\n",
__FUNCTION__);
ret_val = Spartan2_load (desc, buf, bsize);
......@@ -69,7 +69,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Spartan3:
#if (CONFIG_FPGA & CFG_SPARTAN3)
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Loader...\n",
__FUNCTION__);
ret_val = Spartan3_load (desc, buf, bsize);
......@@ -79,7 +79,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Virtex2:
#if (CONFIG_FPGA & CFG_VIRTEX2)
#if defined(CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Loader...\n",
__FUNCTION__);
ret_val = Virtex2_load (desc, buf, bsize);
......@@ -106,7 +106,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
} else
switch (desc->family) {
case Xilinx_Spartan2:
#if (CONFIG_FPGA & CFG_SPARTAN2)
#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Reader...\n",
__FUNCTION__);
ret_val = Spartan2_dump (desc, buf, bsize);
......@@ -116,7 +116,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Spartan3:
#if (CONFIG_FPGA & CFG_SPARTAN3)
#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Reader...\n",
__FUNCTION__);
ret_val = Spartan3_dump (desc, buf, bsize);
......@@ -126,7 +126,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Virtex2:
#if (CONFIG_FPGA & CFG_VIRTEX2)
#if defined( CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Reader...\n",
__FUNCTION__);
ret_val = Virtex2_dump (desc, buf, bsize);
......@@ -198,7 +198,7 @@ int xilinx_info (Xilinx_desc * desc)
printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
switch (desc->family) {
case Xilinx_Spartan2:
#if (CONFIG_FPGA & CFG_SPARTAN2)
#if defined(CONFIG_FPGA_SPARTAN2)
Spartan2_info (desc);
#else
/* just in case */
......@@ -207,7 +207,7 @@ int xilinx_info (Xilinx_desc * desc)
#endif
break;
case Xilinx_Spartan3:
#if (CONFIG_FPGA & CFG_SPARTAN3)
#if defined(CONFIG_FPGA_SPARTAN3)
Spartan3_info (desc);
#else
/* just in case */
......@@ -216,7 +216,7 @@ int xilinx_info (Xilinx_desc * desc)
#endif
break;
case Xilinx_Virtex2:
#if (CONFIG_FPGA & CFG_VIRTEX2)
#if defined(CONFIG_FPGA_VIRTEX2)
Virtex2_info (desc);
#else
/* just in case */
......@@ -249,7 +249,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
} else
switch (desc->family) {
case Xilinx_Spartan2:
#if (CONFIG_FPGA & CFG_SPARTAN2)
#if defined(CONFIG_FPGA_SPARTAN2)
ret_val = Spartan2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-II devices.\n",
......@@ -257,7 +257,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
#endif
break;
case Xilinx_Spartan3:
#if (CONFIG_FPGA & CFG_SPARTAN3)
#if defined(CONFIG_FPGA_SPARTAN3)
ret_val = Spartan3_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-III devices.\n",
......@@ -265,7 +265,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
#endif
break;
case Xilinx_Virtex2:
#if (CONFIG_FPGA & CFG_VIRTEX2)
#if defined(CONFIG_FPGA_VIRTEX2)
ret_val = Virtex2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Virtex-II devices.\n",
......@@ -308,4 +308,4 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn)
return ret_val;
}
#endif /* CONFIG_FPGA & CFG_FPGA_XILINX */
#endif /* CONFIG_FPGA && CONFIG_FPGA_XILINX */
......@@ -273,7 +273,9 @@
* Virtex2 FPGA configuration support
*/
#define CONFIG_FPGA_COUNT 1
#define CONFIG_FPGA CFG_XILINX_VIRTEX2
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_VIRTEX2
#define CFG_FPGA_PROG_FEEDBACK
......
......@@ -192,7 +192,9 @@
/* FPGA - Spartan 2 */
/* experiment
#define CONFIG_FPGA CFG_SPARTAN3
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_SPARTAN3
#define CONFIG_FPGA_COUNT 1
#define CFG_FPGA_PROG_FEEDBACK
#define CFG_FPGA_CHECK_CTRLC
......
......@@ -296,7 +296,9 @@
/*-----------------------------------------------------------------------
* FPGA stuff
*-----------------------------------------------------------------------*/
#define CONFIG_FPGA CFG_ALTERA_CYCLON2
#define CONFIG_FPGA
#define CONFIG_FPGA_ALTERA
#define CONFIG_FPGA_CYCLON2
#define CFG_FPGA_CHECK_CTRLC
#define CFG_FPGA_PROG_FEEDBACK
#define CONFIG_FPGA_COUNT 1 /* Ich habe 2 ... aber in
......
......@@ -31,11 +31,11 @@
*********************************************************************/
#define CFG_SPARTAN2 CFG_FPGA_DEV( 0x1 )
#define CFG_VIRTEX_E CFG_FPGA_DEV( 0x2 )
#define CFG_VIRTEX2 CFG_FPGA_DEV( 0x4 )
#define CFG_VIRTEX2 CFG_FPGA_DEV( 0x4 )
#define CFG_SPARTAN3 CFG_FPGA_DEV( 0x8 )
#define CFG_XILINX_SPARTAN2 (CFG_FPGA_XILINX | CFG_SPARTAN2)
#define CFG_XILINX_VIRTEX_E (CFG_FPGA_XILINX | CFG_VIRTEX_E)
#define CFG_XILINX_VIRTEX2 (CFG_FPGA_XILINX | CFG_VIRTEX2)
#define CFG_XILINX_VIRTEX2 (CFG_FPGA_XILINX | CFG_VIRTEX2)
#define CFG_XILINX_SPARTAN3 (CFG_FPGA_XILINX | CFG_SPARTAN3)
/* XXX - Add new models here */
......
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