Commit 04f79536 authored by Philip Paeps's avatar Philip Paeps Committed by Stefano Babic

mx35 iomux: correct offsets of IOMUX registers

This makes mxc_iomux_set_input() work correctly.  Previously, the
incorrect offset of IOMUXSW_INPUT_CTL caused mxc_iomux_set_input()
to write to the wrong register, possibly resulting in unexpected
behaviour.
Signed-off-by: default avatarPhilip Paeps <philip@paeps.cx>
Acked-by: default avatarStefano Babic <sbabic@denx.de>
parent c4a4e2e2
......@@ -34,8 +34,8 @@ enum iomux_reg_addr {
IOMUXSW_MUX_CTL = IOMUXC_BASE_ADDR + 4, /* MUX control */
IOMUXSW_MUX_END = IOMUXC_BASE_ADDR + 0x324, /* last MUX control */
IOMUXSW_PAD_CTL = IOMUXC_BASE_ADDR + 0x328, /* Pad control */
IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x794, /* last Pad control */
IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7AC, /* input select */
IOMUXSW_PAD_END = IOMUXC_BASE_ADDR + 0x7A4, /* last Pad control */
IOMUXSW_INPUT_CTL = IOMUXC_BASE_ADDR + 0x7A8, /* input select */
IOMUXSW_INPUT_END = IOMUXC_BASE_ADDR + 0x9F4, /* last input select */
};
......
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