Commit 0991701a authored by Anton Staaf's avatar Anton Staaf Committed by Wolfgang Denk
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powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment

Signed-off-by: default avatarAnton Staaf <>
Acked-by: default avatarStefan Roese <>
Cc: Mike Frysinger <>
Cc: Lukasz Majewski <>
Cc: Wolfgang Denk <>
Cc: Stefan Roese <>
parent 6fa6035f
......@@ -20,6 +20,12 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
* Use the L1 data cache line size value for the minimum DMA buffer alignment
* on PowerPC.
* For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too
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