Commit 0991701a authored by Anton Staaf's avatar Anton Staaf Committed by Wolfgang Denk
Browse files

powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignment


Signed-off-by: default avatarAnton Staaf <robotboy@chromium.org>
Acked-by: default avatarStefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
parent 6fa6035f
......@@ -20,6 +20,12 @@
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment
* on PowerPC.
*/
#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
/*
* For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too
*/
......
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