Commit 0a42c3a4 authored by Wolfgang Denk's avatar Wolfgang Denk
Browse files

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

parents 5912d365 66e821eb
......@@ -403,6 +403,7 @@ LIST_85xx=" \
MPC8560ADS \
MPC8568MDS \
MPC8569MDS \
MPC8569MDS_ATM \
MPC8572DS \
MPC8572DS_36BIT \
P2020DS \
......
......@@ -2489,8 +2489,9 @@ MPC8555CDS_config: unconfig
MPC8568MDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale
MPC8569MDS_ATM_config \
MPC8569MDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8569mds freescale
@$(MKCONFIG) -t $(@:_config=) MPC8569MDS ppc mpc85xx mpc8569mds freescale
MPC8572DS_36BIT_config \
MPC8572DS_config: unconfig
......
......@@ -63,7 +63,7 @@ int pib_init(void)
#endif
#if defined(CONFIG_PQ_MDS_PIB_ATM)
#if defined(CONFIG_MPC8360EMDS)
#if defined(CONFIG_MPC8360EMDS) || defined(CONFIG_MPC8569MDS)
val8 = 0;
i2c_write(0x20, 0x6, 1, &val8, 1);
i2c_write(0x20, 0x7, 1, &val8, 1);
......
......@@ -39,6 +39,9 @@
#include <fsl_esdhc.h>
#include "bcsr.h"
#if defined(CONFIG_PQ_MDS_PIB)
#include "../common/pq-mds-pib.h"
#endif
phys_size_t fixed_sdram(void);
......@@ -545,6 +548,10 @@ void pci_init_board(void)
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
#if defined(CONFIG_PQ_MDS_PIB)
pib_init();
#endif
#ifdef CONFIG_PCIE1
pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
......
......@@ -331,6 +331,23 @@ static void ft_fixup_dpaa_clks(void *blob)
#define ft_fixup_dpaa_clks(x)
#endif
#ifdef CONFIG_QE
static void ft_fixup_qe_snum(void *blob)
{
unsigned int svr;
svr = mfspr(SPRN_SVR);
if (SVR_SOC_VER(svr) == SVR_8569_E) {
if(IS_SVR_REV(svr, 1, 0))
do_fixup_by_compat_u32(blob, "fsl,qe",
"fsl,qe-num-snums", 46, 1);
else
do_fixup_by_compat_u32(blob, "fsl,qe",
"fsl,qe-num-snums", 76, 1);
}
}
#endif
void ft_cpu_setup(void *blob, bd_t *bd)
{
int off;
......@@ -367,6 +384,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
"bus-frequency", gd->lbc_clk, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
ft_fixup_qe_snum(blob);
#endif
#ifdef CONFIG_SYS_NS16550
......
......@@ -80,8 +80,8 @@ void get_sys_info (sys_info_t * sysInfo)
freqCC_PLL[2] = sysclk;
freqCC_PLL[3] = sysclk;
sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0xf;
sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0xf);
sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0x1f);
freqCC_PLL[0] *= (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
freqCC_PLL[1] *= (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
freqCC_PLL[2] *= (in_be32(&clk->pllc3gsr) >> 1) & 0x3f;
......@@ -103,21 +103,21 @@ void get_sys_info (sys_info_t * sysInfo)
#ifdef CONFIG_SYS_DPAA_PME
if (rcw_tmp & PME_CLK_SEL)
sysInfo->freqPME = sysInfo->freqSystemBus / 2;
else
sysInfo->freqPME = freqCC_PLL[2] / 2;
else
sysInfo->freqPME = sysInfo->freqSystemBus / 2;
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
if (rcw_tmp & FM1_CLK_SEL)
sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
else
sysInfo->freqFMan[0] = freqCC_PLL[2] / 2;
else
sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
#if (CONFIG_SYS_NUM_FMAN) == 2
if (rcw_tmp & FM2_CLK_SEL)
sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
else
sysInfo->freqFMan[1] = freqCC_PLL[2] / 2;
else
sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
#endif
#endif
......@@ -170,7 +170,12 @@ void get_sys_info (sys_info_t * sysInfo)
}
#endif
if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
#if !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
#if defined(CONFIG_FSL_CORENET)
/* If this is corenet based SoC, bit-representation
* for four times the clock divider values.
*/
lcrr_div *= 4;
#elif !defined(CONFIG_MPC8540) && !defined(CONFIG_MPC8541) && \
!defined(CONFIG_MPC8555) && !defined(CONFIG_MPC8560)
/*
* Yes, the entire PQ38 family use the same
......
......@@ -51,6 +51,11 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_CLK_FREQ 66666666
#define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ
#ifdef CONFIG_MK_ATM
#define CONFIG_PQ_MDS_PIB
#define CONFIG_PQ_MDS_PIB_ATM
#endif
/*
* These can be toggled for performance analysis, otherwise use default.
*/
......
......@@ -203,6 +203,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_HWCONFIG
#define CONFIG_SYS_INIT_RAM_LOCK 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */
......
......@@ -32,7 +32,7 @@
#define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
#define SYSCTL_TIMEOUT_MASK 0x000f0000
#define SYSCTL_CLOCK_MASK 0x00000fff
#define SYSCTL_CLOCK_MASK 0x0000fff0
#define SYSCTL_PEREN 0x00000004
#define SYSCTL_HCKEN 0x00000002
#define SYSCTL_IPGEN 0x00000001
......
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