Commit 0cf87615 authored by Tom Rini's avatar Tom Rini

Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

parents 0ce4af99 f06f9a1f
......@@ -19,30 +19,14 @@ config TARGET_PPMC7XX
config TARGET_ELPPC
bool "Support ELPPC"
config TARGET_CPCI750
bool "Support CPCI750"
config TARGET_MPC7448HPC2
bool "Support mpc7448hpc2"
config TARGET_DB64360
bool "Support DB64360"
config TARGET_DB64460
bool "Support DB64460"
config TARGET_P3MX
bool "Support p3mx"
endchoice
source "board/Marvell/db64360/Kconfig"
source "board/Marvell/db64460/Kconfig"
source "board/eltec/elppc/Kconfig"
source "board/esd/cpci750/Kconfig"
source "board/evb64260/Kconfig"
source "board/freescale/mpc7448hpc2/Kconfig"
source "board/ppmc7xx/Kconfig"
source "board/prodrive/p3mx/Kconfig"
endmenu
......@@ -28,13 +28,6 @@
#include <asm/mmu.h>
#include <asm/u-boot.h>
#if !defined(CONFIG_DB64360) && \
!defined(CONFIG_DB64460) && \
!defined(CONFIG_CPCI750) && \
!defined(CONFIG_P3Mx)
#include <galileo/gt64260R.h>
#endif
/* We don't want the MMU yet.
*/
#undef MSR_KERNEL
......@@ -712,11 +705,7 @@ in_ram:
bne 5b
6:
mr r3, r10 /* Destination Address */
#if defined(CONFIG_DB64360) || \
defined(CONFIG_DB64460) || \
defined(CONFIG_CPCI750) || \
defined(CONFIG_PPMC7XX) || \
defined(CONFIG_P3Mx)
#if defined(CONFIG_PPMC7XX)
mr r4, r9 /* Use RAM copy of the global data */
#endif
bl after_reloc
......
......@@ -28,9 +28,6 @@ config TARGET_EP82XXM
config TARGET_GW8260
bool "Support gw8260"
config TARGET_HYMOD
bool "Support hymod"
config TARGET_IPHASE4539
bool "Support IPHASE4539"
......@@ -55,18 +52,9 @@ config TARGET_MPC8266ADS
config TARGET_VOVPN_GW
bool "Support VoVPN-GW"
config TARGET_IDS8247
bool "Support IDS8247"
config TARGET_KM82XX
bool "Support km82xx"
config TARGET_TQM8260
bool "Support TQM8260"
config TARGET_TQM8272
bool "Support TQM8272"
endchoice
source "board/atc/Kconfig"
......@@ -78,8 +66,6 @@ source "board/ep82xxm/Kconfig"
source "board/freescale/mpc8266ads/Kconfig"
source "board/funkwerk/vovpn-gw/Kconfig"
source "board/gw8260/Kconfig"
source "board/hymod/Kconfig"
source "board/ids/ids8247/Kconfig"
source "board/iphase4539/Kconfig"
source "board/keymile/km82xx/Kconfig"
source "board/muas3001/Kconfig"
......@@ -87,7 +73,5 @@ source "board/pm826/Kconfig"
source "board/pm828/Kconfig"
source "board/ppmc8260/Kconfig"
source "board/sacsng/Kconfig"
source "board/tqc/tqm8260/Kconfig"
source "board/tqc/tqm8272/Kconfig"
endmenu
......@@ -645,32 +645,7 @@ eth_loopback_test (void)
/* 28.9 - (1-2): ioports have been set up already */
#if defined(CONFIG_HYMOD)
/*
* Attention: this is board-specific
* 0, FCC1
* 1, FCC2
* 2, FCC3
*/
# define FCC_START_LOOP 0
# define FCC_END_LOOP 2
/*
* Attention: this is board-specific
* - FCC1 Rx-CLK is CLK10
* - FCC1 Tx-CLK is CLK11
* - FCC2 Rx-CLK is CLK13
* - FCC2 Tx-CLK is CLK14
* - FCC3 Rx-CLK is CLK15
* - FCC3 Tx-CLK is CLK16
*/
/* 28.9 - (3): connect FCC's tx and rx clocks */
immr->im_cpmux.cmx_uar = 0;
immr->im_cpmux.cmx_fcr = CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11|\
CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14|\
CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16;
#elif defined(CONFIG_SACSng)
#if defined(CONFIG_SACSng)
/*
* Attention: this is board-specific
* 1, FCC2
......
......@@ -142,15 +142,7 @@ int interrupt_init_cpu (unsigned *decrementer_count)
immr->im_intctl.ic_sipnrh = 0xffffffff;
immr->im_intctl.ic_sipnrl = 0xffffffff;
#ifdef CONFIG_HYMOD
/*
* ensure all external interrupt sources default to trigger on
* high-to-low transition (i.e. edge triggered active low)
*/
immr->im_intctl.ic_siexr = -1;
#endif
return (0);
return 0;
}
/****************************************************************************/
......
......@@ -262,8 +262,6 @@ void pci_mpc8250_init (struct pci_controller *hose)
| SIUMCR_CS10PC00
| SIUMCR_BCTLC00
| SIUMCR_MMR11;
#elif defined(CONFIG_TQM8272)
/* nothing to do for this Board here */
#else
/*
* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
......
......@@ -48,9 +48,6 @@
GOT_ENTRY(__init_end)
GOT_ENTRY(__bss_end)
GOT_ENTRY(__bss_start)
#if defined(CONFIG_HYMOD)
GOT_ENTRY(environment)
#endif
END_GOT
/*
......@@ -878,18 +875,7 @@ clear_bss:
* Now clear BSS segment
*/
lwz r3,GOT(__bss_start)
#if defined(CONFIG_HYMOD)
/*
* For HYMOD - the environment is the very last item in flash.
* The real .bss stops just before environment starts, so only
* clear up to that point.
*
* taken from mods for FADS board
*/
lwz r4,GOT(environment)
#else
lwz r4,GOT(__bss_end)
#endif
cmplw 0, r3, r4
beq 6f
......
......@@ -958,18 +958,7 @@ clear_bss:
* Now clear BSS segment
*/
lwz r3,GOT(__bss_start)
#if defined(CONFIG_HYMOD)
/*
* For HYMOD - the environment is the very last item in flash.
* The real .bss stops just before environment starts, so only
* clear up to that point.
*
* taken from mods for FADS board
*/
lwz r4,GOT(environment)
#else
lwz r4,GOT(__bss_end)
#endif
cmplw 0, r3, r4
beq 6f
......
......@@ -13,9 +13,6 @@ config TARGET_SBC8548
config TARGET_SOCRATES
bool "Support socrates"
config TARGET_HWW1U1A
bool "Support HWW1U1A"
config TARGET_B4860QDS
bool "Support B4860QDS"
......@@ -144,7 +141,6 @@ config TARGET_XPEDITE550X
endchoice
source "board/exmeritus/hww1u1a/Kconfig"
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
......
......@@ -16,9 +16,6 @@ config TARGET_ESTEEM192E
config TARGET_HERMES
bool "Support hermes"
config TARGET_ICU862
bool "Support ICU862"
config TARGET_IP860
bool "Support IP860"
......@@ -43,9 +40,6 @@ config TARGET_RRVISION
config TARGET_SPD823TS
bool "Support SPD823TS"
config TARGET_MHPC
bool "Support MHPC"
config TARGET_TOP860
bool "Support TOP860"
......@@ -120,11 +114,9 @@ endchoice
source "board/LEOX/elpt860/Kconfig"
source "board/RRvision/Kconfig"
source "board/cogent/Kconfig"
source "board/eltec/mhpc/Kconfig"
source "board/emk/top860/Kconfig"
source "board/esteem192e/Kconfig"
source "board/hermes/Kconfig"
source "board/icu862/Kconfig"
source "board/ip860/Kconfig"
source "board/ivm/Kconfig"
source "board/kup/kup4k/Kconfig"
......
......@@ -126,12 +126,10 @@ void cpu_init_f (volatile immap_t * immr)
*/
#if defined(CONFIG_HERMES) || \
defined(CONFIG_ICU862) || \
defined(CONFIG_IP860) || \
defined(CONFIG_IVML24) || \
defined(CONFIG_IVMS8) || \
defined(CONFIG_LWMON) || \
defined(CONFIG_MHPC) || \
defined(CONFIG_R360MPI) || \
defined(CONFIG_RMU) || \
defined(CONFIG_SPD823TS)
......
......@@ -205,11 +205,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length)
j = 0;
while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY) && (j<TOUT_LOOP)) {
#if defined(CONFIG_ICU862)
udelay(10);
#else
udelay(1);
#endif
j++;
}
if (j>=TOUT_LOOP) {
......@@ -424,7 +420,7 @@ static void fec_pin_init(int fecidx)
#endif /* !CONFIG_RMII */
#elif !defined(CONFIG_ICU862)
#else
/*
* Configure all of port D for MII.
*/
......@@ -437,42 +433,8 @@ static void fec_pin_init(int fecidx)
immr->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
else
immr->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
#else
/*
* Configure port A for MII.
*/
#if defined(CONFIG_ICU862) && defined(CONFIG_SYS_DISCOVER_PHY)
/*
* On the ICU862 board the MII-MDC pin is routed to PD8 pin
* * of CPU, so for this board we need to configure Utopia and
* * enable PD8 to MII-MDC function
*/
immr->im_ioport.iop_pdpar |= 0x4080;
#endif
/*
* Has Utopia been configured?
*/
if (immr->im_ioport.iop_pdpar & (0x8000 >> 1)) {
/*
* YES - Use MUXED mode for UTOPIA bus.
* This frees Port A for use by MII (see 862UM table 41-6).
*/
immr->im_ioport.utmode &= ~0x80;
} else {
/*
* NO - set SPLIT mode for UTOPIA bus.
*
* This doesn't really effect UTOPIA (which isn't
* enabled anyway) but just tells the 862
* to use port A for MII (see 862UM table 41-6).
*/
immr->im_ioport.utmode |= 0x80;
}
#endif /* !defined(CONFIG_ICU862) */
#endif /* CONFIG_ETHER_ON_FEC1 */
} else if (fecidx == 1) {
......
......@@ -59,6 +59,7 @@ typedef struct sysconf512x {
u8 res2[0x28];
law512x_t ddrlaw; /* DDR Local Access Window */
u8 res3[0x18];
u32 mbxbar; /* MBX Base Address */
u32 srambar; /* SRAM Base Address */
u32 nfcbar; /* NFC Base Address */
u8 res4[0x34];
......
......@@ -77,9 +77,6 @@ typedef struct bd_info {
unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
#endif
#if defined(CONFIG_HYMOD)
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
#ifdef CONFIG_HAS_ETH1
unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
......
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/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*
* Hacked for the marvell db64360 eval board by
* Ingo Assmus <ingo.assmus@keymile.com>
*/
#include <common.h>
#include <mpc8xx.h>
#include "../include/mv_gen_reg.h"
#include "../include/memory.h"
#include "intel_flash.h"
/*-----------------------------------------------------------------------
* Protection Flags:
*/
#define FLAG_PROTECT_SET 0x01
#define FLAG_PROTECT_CLEAR 0x02
static void bank_reset (flash_info_t * info, int sect)
{
bank_addr_t addrw, eaddrw;
addrw = (bank_addr_t) info->start[sect];
eaddrw = BANK_ADDR_NEXT_WORD (addrw);
while (addrw < eaddrw) {
#ifdef FLASH_DEBUG
printf (" writing reset cmd to addr 0x%08lx\n",
(unsigned long) addrw);
#endif
*addrw = BANK_CMD_RST;
addrw++;
}
}
static void bank_erase_init (flash_info_t * info, int sect)
{
bank_addr_t addrw, saddrw, eaddrw;
int flag;
#ifdef FLASH_DEBUG
printf ("0x%08x BANK_CMD_PROG\n", BANK_CMD_PROG);
printf ("0x%08x BANK_CMD_ERASE1\n", BANK_CMD_ERASE1);
printf ("0x%08x BANK_CMD_ERASE2\n", BANK_CMD_ERASE2);
printf ("0x%08x BANK_CMD_CLR_STAT\n", BANK_CMD_CLR_STAT);
printf ("0x%08x BANK_CMD_RST\n", BANK_CMD_RST);
printf ("0x%08x BANK_STAT_RDY\n", BANK_STAT_RDY);
printf ("0x%08x BANK_STAT_ERR\n", BANK_STAT_ERR);
#endif
saddrw = (bank_addr_t) info->start[sect];
eaddrw = BANK_ADDR_NEXT_WORD (saddrw);
#ifdef FLASH_DEBUG
printf ("erasing sector %d, start addr = 0x%08lx "
"(bank next word addr = 0x%08lx)\n", sect,
(unsigned long) saddrw, (unsigned long) eaddrw);
#endif
/* Disable intrs which might cause a timeout here */
flag = disable_interrupts ();
for (addrw = saddrw; addrw < eaddrw; addrw++) {
#ifdef FLASH_DEBUG
printf (" writing erase cmd to addr 0x%08lx\n",
(unsigned long) addrw);
#endif
*addrw = BANK_CMD_ERASE1;
*addrw = BANK_CMD_ERASE2;
}
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
}
static int bank_erase_poll (flash_info_t * info, int sect)
{
bank_addr_t addrw, saddrw, eaddrw;
int sectdone, haderr;
saddrw = (bank_addr_t) info->start[sect];
eaddrw = BANK_ADDR_NEXT_WORD (saddrw);
sectdone = 1;
haderr = 0;
for (addrw = saddrw; addrw < eaddrw; addrw++) {
bank_word_t stat = *addrw;
#ifdef FLASH_DEBUG
printf (" checking status at addr "
"0x%08x [0x%08x]\n", (unsigned long) addrw, stat);
#endif
if ((stat & BANK_STAT_RDY) != BANK_STAT_RDY)
sectdone = 0;
else if ((stat & BANK_STAT_ERR) != 0) {
printf (" failed on sector %d "
"(stat = 0x%08x) at "
"address 0x%p\n", sect, stat, addrw);
*addrw = BANK_CMD_CLR_STAT;
haderr = 1;
}
}
if (haderr)
return (-1);
else
return (sectdone);
}
int write_word_intel (bank_addr_t addr, bank_word_t value)
{
bank_word_t stat;
ulong start;
int flag, retval;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
*addr = BANK_CMD_PROG;
*addr = value;
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts ();
retval = 0;
/* data polling for D7 */
start = get_timer (0);
do {
if (get_timer (start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
retval = 1;
goto done;
}
stat = *addr;
} while ((stat & BANK_STAT_RDY) != BANK_STAT_RDY);
if ((stat & BANK_STAT_ERR) != 0) {
printf ("flash program failed (stat = 0x%08lx) "
"at address 0x%08lx\n", (ulong) stat, (ulong) addr);
*addr = BANK_CMD_CLR_STAT;
retval = 3;
}
done:
/* reset to read mode */
*addr = BANK_CMD_RST;
return (retval);
}
/*-----------------------------------------------------------------------
*/
int flash_erase_intel (flash_info_t * info, int s_first, int s_last)
{
int prot, sect, haderr;
ulong start, now, last;
#ifdef FLASH_DEBUG
printf ("\nflash_erase: erase %d sectors (%d to %d incl.) from\n"
" Bank # %d: ", s_last - s_first + 1, s_first, s_last,
(info - flash_info) + 1);
flash_print_info (info);
#endif
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sector%s will not be erased!\n", prot, (prot > 1 ? "s" : ""));
}
start = get_timer (0);
last = 0;
haderr = 0;
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
ulong estart;
int sectdone;
bank_erase_init (info, sect);
/* wait at least 80us - let's wait 1 ms */
udelay (1000);
estart = get_timer (start);
do {
now = get_timer (start);
if (now - estart > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout (sect %d)\n", sect);
haderr = 1;
break;
}
#ifndef FLASH_DEBUG
/* show that we're waiting */
if ((now - last) > 1000) { /* every second */
putc ('.');
last = now;
}
#endif
sectdone = bank_erase_poll (info, sect);
if (sectdone < 0) {
haderr = 1;
break;
}
} while (!sectdone);
if (haderr)
break;
}
}
if (haderr > 0)
printf (" failed\n");
else
printf (" done\n");
/* reset to read mode */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
bank_reset (info, sect);
}
}
return haderr;
}
#include <config.h>
#include <74xx_7xx.h>
#include "version.h"
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#include <asm/mmu.h>
#include "../include/mv_gen_reg.h"
#ifdef CONFIG_ECC
/* Galileo specific asm code for initializing ECC */
.globl board_relocate_rom
board_relocate_rom:
mflr r7
/* update the location of the GT registers */
lis r11, CONFIG_SYS_GT_REGS@h
/* if we're using ECC, we must use the DMA engine to copy ourselves */
bl start_idma_transfer_0
bl wait_for_idma_0
bl stop_idma_engine_0
mtlr r7
blr