Commit 13c8925c authored by Ye Li's avatar Ye Li Committed by Jason Liu
Browse files

MLK-15297 imx8mq_evk: Change to not static link the DDR PHY FW



To avoid violating GPL license, we can't static link the DDR PHY FW into
uboot binary, so change to attach the FW images with u-boot binary.

Remove the codes and link scripts for static linking the FW in sections.
Signed-off-by: default avatarYe Li <ye.li@nxp.com>
parent 7928d06e
......@@ -140,10 +140,6 @@ ifdef CONFIG_IMX_M4_BIND
OBJCOPYFLAGS += -j .firmware_image
endif
ifdef CONFIG_ARCH_IMX8M
OBJCOPYFLAGS += -j .firmware_imem -j .firmware_dmem
endif
ifneq ($(CONFIG_IMX_CONFIG),)
ifdef CONFIG_SPL
ifndef CONFIG_SPL_BUILD
......
......@@ -49,38 +49,6 @@ SECTIONS
*(.__image_copy_end)
} >.sram
#ifdef CONFIG_ARCH_IMX8M
.firmware_imem_start : {
. = ALIGN(8);
*(.__firmware_imem_start)
}>.sram
.firmware_imem : {
. = ALIGN(8);
KEEP(*(.firmware_imem))
}>.sram
.firmware_imem_end : {
. = ALIGN(8);
*(.__firmware_imem_end)
}>.sram
.firmware_dmem_start : {
. = ALIGN(8);
*(.__firmware_dmem_start)
}>.sram
.firmware_dmem : {
. = ALIGN(8);
KEEP(*(.firmware_dmem))
}>.sram
.firmware_dmem_end : {
. = ALIGN(8);
*(.__firmware_dmem_end)
}>.sram
#endif
.end : {
. = ALIGN(8);
*(.__end)
......
......@@ -8,5 +8,5 @@ obj-y += imx8m_evk.o
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
obj-y += ddr/lpddr4_pub_train_0608_simple.o ddr/train1d.o ddr/helper.o ddr/imem.o
obj-y += ddr/lpddr4_pub_train_0608_simple.o ddr/train1d.o ddr/helper.o
endif
......@@ -10,6 +10,7 @@
#include <errno.h>
#include <asm/io.h>
#include <asm/arch/ddr_memory_map.h>
#include <asm/sections.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -20,18 +21,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define DMEM_OFFSET_ADDR 0x00054000
#define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
char __firmware_imem_start[0] __attribute__((section(".__firmware_imem_start")));
char __firmware_imem_end[0] __attribute__((section(".__firmware_imem_end")));
char __firmware_dmem_start[0] __attribute__((section(".__firmware_dmem_start")));
char __firmware_dmem_end[0] __attribute__((section(".__firmware_dmem_end")));
/* We need PHY iMEM PHY is 32KB padded */
void ddr4_load_train_code(void)
{
u32 tmp32, i;
u32 error = 0;
unsigned long pr_to32, pr_from32;
unsigned long imem_start = (unsigned long)&__firmware_imem_start;
unsigned long dmem_start = (unsigned long)&__firmware_dmem_start;
unsigned long imem_start = (unsigned long)&_end;
unsigned long dmem_start = imem_start + IMEM_LEN;
pr_from32 = imem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
......
.section .firmware_imem,#alloc
.incbin "lpddr4_pmu_train_imem.bin"
.section .firmware_dmem,#alloc
.incbin "lpddr4_pmu_train_dmem.bin"
......@@ -201,9 +201,17 @@ $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-dtb.bin FORCE
$(call if_changed,copy)
else
ifdef CONFIG_ARCH_IMX8M
$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-nodtb.bin FORCE
objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 lpddr4_pmu_train_imem.bin lpddr4_pmu_train_imem_pad.bin
cat lpddr4_pmu_train_imem_pad.bin lpddr4_pmu_train_dmem.bin > lpddr4_pmu_train_fw.bin
cat $(obj)/$(SPL_BIN)-nodtb.bin lpddr4_pmu_train_fw.bin > $(obj)/$(SPL_BIN).bin
rm -f lpddr4_pmu_train_fw.bin lpddr4_pmu_train_imem_pad.bin
else
$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-nodtb.bin FORCE
$(call if_changed,copy)
endif
endif
# Create a file that pads from the end of u-boot-spl-nodtb.bin to bss_end
$(obj)/$(SPL_BIN)-pad.bin: $(obj)/$(SPL_BIN)
......
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