Commit 188e94c3 authored by Shinya Kuribayashi's avatar Shinya Kuribayashi Committed by Wolfgang Denk
Browse files

cpu/mips/cpu.c: Fix flush_cache bug

Cache operations have to take line address (addr), not start_addr.
I noticed this bug when debugging ping failure.
Signed-off-by: default avatarShinya Kuribayashi <>
parent 8f2a68a0
......@@ -56,8 +56,8 @@ void flush_cache(ulong start_addr, ulong size)
unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
while (1) {
cache_op(Hit_Writeback_Inv_D, start_addr);
cache_op(Hit_Invalidate_I, start_addr);
cache_op(Hit_Writeback_Inv_D, addr);
cache_op(Hit_Invalidate_I, addr);
if (addr == aend)
addr += lsize;
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