Commit 1e0cf5c3 authored by Otavio Salvador's avatar Otavio Salvador Committed by Albert ARIBAUD

mxs: Reowork SPL to use 'mxs' prefix for methods

Signed-off-by: default avatarOtavio Salvador <otavio@ossystems.com.br>
parent 9c471142
...@@ -222,8 +222,8 @@ static const char *get_cpu_rev(void) ...@@ -222,8 +222,8 @@ static const char *get_cpu_rev(void)
int print_cpuinfo(void) int print_cpuinfo(void)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
printf("CPU: Freescale i.MX%s rev%s at %d MHz\n", printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
get_cpu_type(), get_cpu_type(),
...@@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) ...@@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
int mx28_dram_init(void) int mx28_dram_init(void)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
if (data->mem_dram_size == 0) { if (data->mem_dram_size == 0) {
printf("MX28:\n" printf("MX28:\n"
......
...@@ -28,18 +28,18 @@ ...@@ -28,18 +28,18 @@
void early_delay(int delay); void early_delay(int delay);
void mx28_power_init(void); void mxs_power_init(void);
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT #ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
void mx28_power_wait_pswitch(void); void mxs_power_wait_pswitch(void);
#else #else
static inline void mx28_power_wait_pswitch(void) { } static inline void mxs_power_wait_pswitch(void) { }
#endif #endif
void mx28_mem_init(void); void mxs_mem_init(void);
uint32_t mx28_mem_get_size(void); uint32_t mxs_mem_get_size(void);
void mx28_lradc_init(void); void mxs_lradc_init(void);
void mx28_lradc_enable_batt_measurement(void); void mxs_lradc_enable_batt_measurement(void);
#endif /* __M28_INIT_H__ */ #endif /* __M28_INIT_H__ */
...@@ -31,7 +31,7 @@ ...@@ -31,7 +31,7 @@
#include <asm/arch/sys_proto.h> #include <asm/arch/sys_proto.h>
#include <asm/gpio.h> #include <asm/gpio.h>
#include "mx28_init.h" #include "mxs_init.h"
/* /*
* This delay function is intended to be used only in early stage of boot, where * This delay function is intended to be used only in early stage of boot, where
...@@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = { ...@@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = {
MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD, MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
}; };
uint8_t mx28_get_bootmode_index(void) uint8_t mxs_get_bootmode_index(void)
{ {
uint8_t bootmode = 0; uint8_t bootmode = 0;
int i; int i;
...@@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void) ...@@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void)
return i; return i;
} }
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size) const unsigned int iomux_size)
{ {
struct mx28_spl_data *data = (struct mx28_spl_data *) struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf); ((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
uint8_t bootmode = mx28_get_bootmode_index(); uint8_t bootmode = mxs_get_bootmode_index();
mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size); mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
mx28_power_init(); mxs_power_init();
mx28_mem_init(); mxs_mem_init();
data->mem_dram_size = mx28_mem_get_size(); data->mem_dram_size = mxs_mem_get_size();
data->boot_mode_idx = bootmode; data->boot_mode_idx = bootmode;
mx28_power_wait_pswitch(); mxs_power_wait_pswitch();
} }
/* Support aparatus */ /* Support aparatus */
......
...@@ -28,9 +28,9 @@ ...@@ -28,9 +28,9 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include "mx28_init.h" #include "mxs_init.h"
void mx28_lradc_init(void) void mxs_lradc_init(void)
{ {
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
...@@ -49,7 +49,7 @@ void mx28_lradc_init(void) ...@@ -49,7 +49,7 @@ void mx28_lradc_init(void)
LRADC_CTRL4_LRADC6SELECT_CHANNEL10); LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
} }
void mx28_lradc_enable_batt_measurement(void) void mxs_lradc_enable_batt_measurement(void)
{ {
struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE; struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
#include <asm/arch/iomux-mx28.h> #include <asm/arch/iomux-mx28.h>
#include <asm/arch/imx-regs.h> #include <asm/arch/imx-regs.h>
#include "mx28_init.h" #include "mxs_init.h"
static uint32_t mx28_dram_vals[] = { static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
...@@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = { ...@@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = {
0x00000000, 0x00010001 0x00000000, 0x00010001
}; };
void __mx28_adjust_memory_params(uint32_t *dram_vals) void __mxs_adjust_memory_params(uint32_t *dram_vals)
{ {
} }
void mx28_adjust_memory_params(uint32_t *dram_vals) void mxs_adjust_memory_params(uint32_t *dram_vals)
__attribute__((weak, alias("__mx28_adjust_memory_params"))); __attribute__((weak, alias("__mxs_adjust_memory_params")));
void init_mx28_200mhz_ddr2(void) void init_mx28_200mhz_ddr2(void)
{ {
int i; int i;
mx28_adjust_memory_params(mx28_dram_vals); mxs_adjust_memory_params(mx28_dram_vals);
for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++) for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i)); writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
} }
void mx28_mem_init_clock(void) void mxs_mem_init_clock(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
...@@ -129,7 +129,7 @@ void mx28_mem_init_clock(void) ...@@ -129,7 +129,7 @@ void mx28_mem_init_clock(void)
early_delay(10000); early_delay(10000);
} }
void mx28_mem_setup_cpu_and_hbus(void) void mxs_mem_setup_cpu_and_hbus(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
...@@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void) ...@@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void)
early_delay(15000); early_delay(15000);
} }
void mx28_mem_setup_vdda(void) void mxs_mem_setup_vdda(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
...@@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void) ...@@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void)
&power_regs->hw_power_vddactrl); &power_regs->hw_power_vddactrl);
} }
void mx28_mem_setup_vddd(void) void mxs_mem_setup_vddd(void)
{ {
struct mxs_power_regs *power_regs = struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE; (struct mxs_power_regs *)MXS_POWER_BASE;
...@@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void) ...@@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void)
&power_regs->hw_power_vdddctrl); &power_regs->hw_power_vdddctrl);
} }
uint32_t mx28_mem_get_size(void) uint32_t mxs_mem_get_size(void)
{ {
uint32_t sz, da; uint32_t sz, da;
uint32_t *vt = (uint32_t *)0x20; uint32_t *vt = (uint32_t *)0x20;
...@@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void) ...@@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void)
return sz; return sz;
} }
void mx28_mem_init(void) void mxs_mem_init(void)
{ {
struct mxs_clkctrl_regs *clkctrl_regs = struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
...@@ -219,9 +219,9 @@ void mx28_mem_init(void) ...@@ -219,9 +219,9 @@ void mx28_mem_init(void)
early_delay(11000); early_delay(11000);
mx28_mem_init_clock(); mxs_mem_init_clock();
mx28_mem_setup_vdda(); mxs_mem_setup_vdda();
/* /*
* Configure the DRAM registers * Configure the DRAM registers
...@@ -242,9 +242,9 @@ void mx28_mem_init(void) ...@@ -242,9 +242,9 @@ void mx28_mem_init(void)
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20))) while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
; ;
mx28_mem_setup_vddd(); mxs_mem_setup_vddd();
early_delay(10000); early_delay(10000);
mx28_mem_setup_cpu_and_hbus(); mxs_mem_setup_cpu_and_hbus();
} }
This diff is collapsed.
...@@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int)); ...@@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
#ifdef CONFIG_SPL_BUILD #ifdef CONFIG_SPL_BUILD
#include <asm/arch/iomux-mx28.h> #include <asm/arch/iomux-mx28.h>
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup, void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
const unsigned int iomux_size); const unsigned int iomux_size);
#endif #endif
...@@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = { ...@@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = {
{ 0x00, 0x00, "Reserved/Unknown/Wrong" }, { 0x00, 0x00, "Reserved/Unknown/Wrong" },
}; };
struct mx28_spl_data { struct mxs_spl_data {
uint8_t boot_mode_idx; uint8_t boot_mode_idx;
uint32_t mem_dram_size; uint32_t mem_dram_size;
}; };
......
...@@ -145,13 +145,13 @@ const iomux_cfg_t iomux_setup[] = { ...@@ -145,13 +145,13 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
/* switch LED on */ /* switch LED on */
gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0); gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
} }
void mx28_adjust_memory_params(uint32_t *dram_vals) void mxs_adjust_memory_params(uint32_t *dram_vals)
{ {
/* /*
* All address lines are routed from CPU to memory chip. * All address lines are routed from CPU to memory chip.
......
...@@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = { ...@@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = {
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
} }
...@@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals) ...@@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals)
void board_init_ll(void) void board_init_ll(void)
{ {
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup)); mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
} }
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