Commit 1fd2d792 authored by Cliff Cai's avatar Cliff Cai Committed by Mike Frysinger

Blackfin: bfin_sdh: set all timer bits before transfer

The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.
Signed-off-by: default avatarCliff Cai <cliff.cai@analog.com>
Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent d633b2db
......@@ -123,7 +123,7 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
bfin_write_SDH_DATA_CTL(data_ctl);
dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
bfin_write_SDH_DATA_TIMER(0xFFFF);
bfin_write_SDH_DATA_TIMER(-1);
blackfin_dcache_flush_invalidate_range(data->dest,
data->dest + data->blocksize);
......
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