Commit 24e84c3d authored by Marek Vasut's avatar Marek Vasut Committed by Wolfgang Denk
Browse files

PXA: Fix ZipitZ2 for Reloc


Signed-off-by: default avatarMarek Vasut <marek.vasut@gmail.com>
parent 720a650c
......@@ -29,17 +29,15 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := zipitz2.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(LIB): $(obj).depend $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
rm -f $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
......
CONFIG_SYS_TEXT_BASE = 0xa1000000
/*
* Aeronix Zipit Z2 Lowlevel Hardware Initialization
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/macro.h>
.globl lowlevel_init
lowlevel_init:
pxa_gpio_setup
pxa_wait_ticks 0x8000
pxa_mem_setup
pxa_wakeup
pxa_intr_setup
pxa_clock_setup
mov pc, lr
......@@ -44,10 +44,11 @@ inline void lcd_start(void) {};
int board_init (void)
{
/* memory and cpu-speed are setup before relocation */
/* so we do _nothing_ here */
/* We have RAM, disable cache */
dcache_disable();
icache_disable();
/* arch number of Lubbock-Board */
/* arch number of Z2 */
gd->bd->bi_arch_number = MACH_TYPE_ZIPIT2;
/* adress of boot parameters */
......@@ -59,24 +60,23 @@ int board_init (void)
return 0;
}
int board_late_init(void)
struct serial_device *default_serial_console (void)
{
setenv("stdout", "serial");
setenv("stderr", "serial");
return 0;
return &serial_stuart_device;
}
struct serial_device *default_serial_console (void)
extern void pxa_dram_init(void);
int dram_init(void)
{
return &serial_stuart_device;
pxa_dram_init();
gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
int dram_init (void)
void dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
}
#ifdef CONFIG_CMD_SPI
......
......@@ -41,8 +41,9 @@
#define CONFIG_ENV_ADDR 0x40000
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_STACKSIZE)
#define CONFIG_SYS_MALLOC_LEN (128*1024)
#define CONFIG_SYS_GBL_DATA_SIZE 512
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
"if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \
......@@ -56,7 +57,7 @@
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_SYS_TEXT_BASE 0x0
#define CONFIG_LZMA /* LZMA compression support */
/*
......@@ -176,7 +177,7 @@ unsigned char zipitz2_spi_read(void);
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1 + 2048)
/*
* NOR FLASH
......@@ -221,7 +222,7 @@ unsigned char zipitz2_spi_read(void);
#define CONFIG_SYS_GPCR3_VAL 0x00000000
#define CONFIG_SYS_GPDR0_VAL 0xdafcee00
#define CONFIG_SYS_GPDR1_VAL 0xffa3aaab
#define CONFIG_SYS_GPDR2_VAL 0x8fe1ffff
#define CONFIG_SYS_GPDR2_VAL 0x8fe9ffff
#define CONFIG_SYS_GPDR3_VAL 0x001b1f8a
#define CONFIG_SYS_GPSR0_VAL 0x06080400
#define CONFIG_SYS_GPSR1_VAL 0x007f0000
......
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