arm: dts: librem5: Drop some unneeded devices

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

arch/arm/dts/librem5.dts

@@ -116,30 +116,6 @@
 			>;
 		};
 
-	        pinctrl_pwm1: pwm1grp {
-	                fsl,pins = <
-				MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT     0x83 /* MOTO */
-			>;
-		};
-#if 0
-		pinctrl_pwm2: pwm2grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT	0x16 /* LED_B */
-			>;
-		};
-
-		pinctrl_pwm3: pwm3grp {
-		       fsl,pins = <
-			       MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT		0x16 /* LED_R */
-		       >;
-		};
-
-		pinctrl_pwm4: pwm4grp {
-		       fsl,pins = <
-			       MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT		0x16 /* LED_G */
-		       >;
-		};
-#endif
 		pinctrl_uart1: uart1grp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x79
@@ -208,58 +184,6 @@
 			>;
 		};
 
-                pinctrl_usdhc2_gpio: usdhc2grpgpio {
-                        fsl,pins = <
-                                MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19             0x41    /* WIFI_nRST */
-                        >;
-                };
-
-		pinctrl_usdhc2: usdhc2grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
-				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
-				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
-				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
-				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
-				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
-				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
-			>;
-		};
-
-		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
-			fsl,pins = <
-				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8d
-				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcd
-				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcd
-				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcd
-				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcd
-				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcd
-				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
-			>;
-		};
-
-		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
-			fsl,pins = <
-				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8f
-				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcf
-				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcf
-				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcf
-				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcf
-				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcf
-				MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
-			>;
-		};
-
-		pinctrl_sai2: sai2grp {
-			fsl,pins = <
-				MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
-				MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
-				MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
-				MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
-				MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8	0xd6
-			>;
-		};
-
 		pinctrl_wdog: wdoggrp {
 			fsl,pins = <
 				MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
@@ -311,26 +235,6 @@
  	};
 };
 
-/*
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm2>;
-	status = "okay";
-};
-
-&pwm3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm3>;
-	status = "okay";
-};
-
-&pwm4 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm4>;
-	status = "okay";
-};
-*/
-
 &uart1 { /* console */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
@@ -339,6 +243,7 @@
 	status = "okay";
 };
 
+/*
 &lcdif {
 	status = "okay";
 	disp-dev = "mipi_dsi_northwest";
@@ -369,8 +274,9 @@
 		};
 	};
 };
+*/
 
-&uart3 { /* BT */
+&uart3 { 
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart3>;
 	assigned-clocks = <&clk IMX8MQ_CLK_UART3_SRC>;
@@ -389,17 +295,6 @@
 	status = "okay";
 };
 
-&usdhc2 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-	bus-width = <4>;
-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-	//vmmc-supply = <&reg_usdhc2_vmmc>;
-	status = "okay";
-};
-
 &usb3_phy0 {
 	status = "okay";
 };