Commit 2b68b233 authored by Heiko Schocher's avatar Heiko Schocher Committed by Kim Phillips
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83xx: add missing TIMING_CFG1_CASLAT_* defines


Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
parent c9e34fe2
...@@ -890,6 +890,8 @@ ...@@ -890,6 +890,8 @@
#define TIMING_CFG1_CASLAT_30 0x00050000 /* CAS latency = 3.0 */ #define TIMING_CFG1_CASLAT_30 0x00050000 /* CAS latency = 3.0 */
#define TIMING_CFG1_CASLAT_35 0x00060000 /* CAS latency = 3.5 */ #define TIMING_CFG1_CASLAT_35 0x00060000 /* CAS latency = 3.5 */
#define TIMING_CFG1_CASLAT_40 0x00070000 /* CAS latency = 4.0 */ #define TIMING_CFG1_CASLAT_40 0x00070000 /* CAS latency = 4.0 */
#define TIMING_CFG1_CASLAT_45 0x00080000 /* CAS latency = 4.5 */
#define TIMING_CFG1_CASLAT_50 0x00090000 /* CAS latency = 5.0 */
/* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2 /* TIMING_CFG_2 - DDR SDRAM Timing Configuration 2
*/ */
......
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