Commit 2c4b2dd2 authored by Wenyou Yang's avatar Wenyou Yang Committed by Andreas Bießmann
Browse files

ARM: at91/dt: Add device tree for SAMA5D2 Xplained



Add device tree for SAMA5D2 Xplained board.
Signed-off-by: default avatarWenyou Yang <wenyou.yang@atmel.com>
parent 256a3f24
......@@ -270,6 +270,9 @@ dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2e-evm.dtb \
k2g-evm.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
at91-sama5d2_xplained.dtb
targets += $(dtb-y)
# Add any required device tree compiler flags here
......
/dts-v1/;
#include "sama5d2.dtsi"
#include "sama5d2-pinfunc.h"
/ {
model = "Atmel SAMA5D2 Xplained";
compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
chosen {
stdout-path = &uart1;
};
ahb {
usb1: ohci@00400000 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 42 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_default>;
status = "okay";
};
usb2: ehci@00500000 {
status = "okay";
};
sdmmc0: sdio-host@a0000000 {
bus-width = <8>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
status = "okay";
};
sdmmc1: sdio-host@b0000000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
status = "okay"; /* conflict with qspi0 */
};
apb {
qspi0: spi@f0020000 {
status = "okay";
flash@0 {
compatible = "atmel,sama5d2-qspi-flash";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi0_default>;
spi-max-frequency = <83000000>;
partition@00000000 {
label = "boot";
reg = <0x00000000 0x00c00000>;
};
partition@00c00000 {
label = "rootfs";
reg = <0x00c00000 0x00000000>;
};
};
};
spi0: spi@f8000000 {
cs-gpios = <&pioA 17 0>, <0>, <0>, <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0_default>;
status = "okay";
spi_flash@0 {
compatible = "spi-flash";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
macb0: ethernet@f8008000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
phy-mode = "rmii";
status = "okay";
ethernet-phy@1 {
reg = <0x1>;
};
};
uart1: serial@f8020000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
status = "okay";
};
i2c1: i2c@fc028000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
status = "okay";
};
pioA: gpio@fc038000 {
pinctrl {
pinctrl_i2c1_default: i2c1_default {
pinmux = <PIN_PD4__TWD1>,
<PIN_PD5__TWCK1>;
bias-disable;
};
pinctrl_macb0_phy_irq: macb0_phy_irq {
pinmux = <PIN_PC9__GPIO>;
bias-disable;
};
pinctrl_macb0_rmii: macb0_rmii {
pinmux = <PIN_PB14__GTXCK>,
<PIN_PB15__GTXEN>,
<PIN_PB16__GRXDV>,
<PIN_PB17__GRXER>,
<PIN_PB18__GRX0>,
<PIN_PB19__GRX1>,
<PIN_PB20__GTX0>,
<PIN_PB21__GTX1>,
<PIN_PB22__GMDC>,
<PIN_PB23__GMDIO>;
bias-disable;
};
pinctrl_qspi0_default: qspi0_default {
pinmux = <PIN_PA22__QSPI0_SCK>,
<PIN_PA23__QSPI0_CS>,
<PIN_PA24__QSPI0_IO0>,
<PIN_PA25__QSPI0_IO1>,
<PIN_PA26__QSPI0_IO2>,
<PIN_PA27__QSPI0_IO3>;
bias-disable;
};
pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA2__SDMMC0_DAT0>,
<PIN_PA3__SDMMC0_DAT1>,
<PIN_PA4__SDMMC0_DAT2>,
<PIN_PA5__SDMMC0_DAT3>,
<PIN_PA6__SDMMC0_DAT4>,
<PIN_PA7__SDMMC0_DAT5>,
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
};
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA10__SDMMC0_RSTN>,
<PIN_PA11__SDMMC0_VDDSEL>,
<PIN_PA13__SDMMC0_CD>;
bias-disable;
};
pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
pinmux = <PIN_PA28__SDMMC1_CMD>,
<PIN_PA18__SDMMC1_DAT0>,
<PIN_PA19__SDMMC1_DAT1>,
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
};
pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
pinmux = <PIN_PA22__SDMMC1_CK>,
<PIN_PA30__SDMMC1_CD>;
bias-disable;
};
pinctrl_spi0_default: spi0_default {
pinmux = <PIN_PA14__SPI0_SPCK>,
<PIN_PA15__SPI0_MOSI>,
<PIN_PA16__SPI0_MISO>;
bias-disable;
};
pinctrl_uart1_default: uart1_default {
pinmux = <PIN_PD2__URXD1>,
<PIN_PD3__UTXD1>;
bias-disable;
};
pinctrl_usb_default: usb_default {
pinmux = <PIN_PB10__GPIO>;
bias-disable;
};
pinctrl_usba_vbus: usba_vbus {
pinmux = <PIN_PA31__GPIO>;
bias-disable;
};
};
};
};
};
};
#include "skeleton.dtsi"
/ {
model = "Atmel SAMA5D2 family SoC";
compatible = "atmel,sama5d2";
aliases {
spi0 = &spi0;
spi1 = &qspi0;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
clocks {
slow_xtal: slow_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
main_xtal: main_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
};
ahb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
usb1: ohci@00400000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00400000 0x100000>;
clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
clock-names = "ohci_clk", "hclk", "uhpck";
status = "disabled";
};
usb2: ehci@00500000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00500000 0x100000>;
clocks = <&utmi>, <&uhphs_clk>;
clock-names = "usb_clk", "ehci_clk";
status = "disabled";
};
sdmmc0: sdio-host@a0000000 {
compatible = "atmel,sama5d2-sdhci";
reg = <0xa0000000 0x300>;
clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
clock-names = "hclock", "multclk", "baseclk";
status = "disabled";
};
sdmmc1: sdio-host@b0000000 {
compatible = "atmel,sama5d2-sdhci";
reg = <0xb0000000 0x300>;
clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
clock-names = "hclock", "multclk", "baseclk";
status = "disabled";
};
apb {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
pmc: pmc@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
main: mainck {
compatible = "atmel,at91sam9x5-clk-main";
#clock-cells = <0>;
};
plla: pllack {
compatible = "atmel,sama5d3-clk-pll";
#clock-cells = <0>;
clocks = <&main>;
reg = <0>;
atmel,clk-input-range = <12000000 12000000>;
#atmel,pll-clk-output-range-cells = <4>;
atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
};
plladiv: plladivck {
compatible = "atmel,at91sam9x5-clk-plldiv";
#clock-cells = <0>;
clocks = <&plla>;
};
audio_pll_frac: audiopll_fracck {
compatible = "atmel,sama5d2-clk-audio-pll-frac";
#clock-cells = <0>;
clocks = <&main>;
};
audio_pll_pad: audiopll_padck {
compatible = "atmel,sama5d2-clk-audio-pll-pad";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
audio_pll_pmc: audiopll_pmcck {
compatible = "atmel,sama5d2-clk-audio-pll-pmc";
#clock-cells = <0>;
clocks = <&audio_pll_frac>;
};
utmi: utmick {
compatible = "atmel,at91sam9x5-clk-utmi";
#clock-cells = <0>;
clocks = <&main>;
};
mck: masterck {
compatible = "atmel,at91sam9x5-clk-master";
#clock-cells = <0>;
clocks = <&main>, <&plladiv>, <&utmi>;
atmel,clk-output-range = <124000000 166000000>;
atmel,clk-divisors = <1 2 4 3>;
};
h32ck: h32mxck {
#clock-cells = <0>;
compatible = "atmel,sama5d4-clk-h32mx";
clocks = <&mck>;
};
usb: usbck {
compatible = "atmel,at91sam9x5-clk-usb";
#clock-cells = <0>;
clocks = <&plladiv>, <&utmi>;
};
prog: progck {
compatible = "atmel,at91sam9x5-clk-programmable";
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&pmc>;
clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
prog0: prog0 {
#clock-cells = <0>;
reg = <0>;
};
prog1: prog1 {
#clock-cells = <0>;
reg = <1>;
};
prog2: prog2 {
#clock-cells = <0>;
reg = <2>;
};
};
systemck {
compatible = "atmel,at91rm9200-clk-system";
#address-cells = <1>;
#size-cells = <0>;
ddrck: ddrck {
#clock-cells = <0>;
reg = <2>;
clocks = <&mck>;
};
lcdck: lcdck {
#clock-cells = <0>;
reg = <3>;
clocks = <&mck>;
};
uhpck: uhpck {
#clock-cells = <0>;
reg = <6>;
clocks = <&usb>;
};
udpck: udpck {
#clock-cells = <0>;
reg = <7>;
clocks = <&usb>;
};
pck0: pck0 {
#clock-cells = <0>;
reg = <8>;
clocks = <&prog0>;
};
pck1: pck1 {
#clock-cells = <0>;
reg = <9>;
clocks = <&prog1>;
};
pck2: pck2 {
#clock-cells = <0>;
reg = <10>;
clocks = <&prog2>;
};
iscck: iscck {
#clock-cells = <0>;
reg = <18>;
clocks = <&mck>;
};
};
periph32ck {
compatible = "atmel,at91sam9x5-clk-peripheral";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&h32ck>;
macb0_clk: macb0_clk {
#clock-cells = <0>;
reg = <5>;
atmel,clk-output-range = <0 83000000>;
};
tdes_clk: tdes_clk {
#clock-cells = <0>;
reg = <11>;
atmel,clk-output-range = <0 83000000>;
};
matrix1_clk: matrix1_clk {
#clock-cells = <0>;
reg = <14>;
};
hsmc_clk: hsmc_clk {
#clock-cells = <0>;
reg = <17>;
};
pioA_clk: pioA_clk {
#clock-cells = <0>;
reg = <18>;
atmel,clk-output-range = <0 83000000>;
};
flx0_clk: flx0_clk {
#clock-cells = <0>;
reg = <19>;
atmel,clk-output-range = <0 83000000>;
};
flx1_clk: flx1_clk {
#clock-cells = <0>;
reg = <20>;
atmel,clk-output-range = <0 83000000>;
};
flx2_clk: flx2_clk {
#clock-cells = <0>;
reg = <21>;
atmel,clk-output-range = <0 83000000>;
};
flx3_clk: flx3_clk {
#clock-cells = <0>;
reg = <22>;
atmel,clk-output-range = <0 83000000>;
};
flx4_clk: flx4_clk {
#clock-cells = <0>;
reg = <23>;
atmel,clk-output-range = <0 83000000>;
};
uart0_clk: uart0_clk {
#clock-cells = <0>;
reg = <24>;
atmel,clk-output-range = <0 83000000>;
};
uart1_clk: uart1_clk {
#clock-cells = <0>;
reg = <25>;
atmel,clk-output-range = <0 83000000>;
};
uart2_clk: uart2_clk {
#clock-cells = <0>;
reg = <26>;
atmel,clk-output-range = <0 83000000>;
};
uart3_clk: uart3_clk {
#clock-cells = <0>;
reg = <27>;
atmel,clk-output-range = <0 83000000>;
};
uart4_clk: uart4_clk {
#clock-cells = <0>;
reg = <28>;
atmel,clk-output-range = <0 83000000>;
};
twi0_clk: twi0_clk {
reg = <29>;
#clock-cells = <0>;
atmel,clk-output-range = <0 83000000>;
};
twi1_clk: twi1_clk {
#clock-cells = <0>;
reg = <30>;
atmel,clk-output-range = <0 83000000>;
};
spi0_clk: spi0_clk {
#clock-cells = <0>;
reg = <33>;
atmel,clk-output-range = <0 83000000>;
};
spi1_clk: spi1_clk {
#clock-cells = <0>;
reg = <34>;
atmel,clk-output-range = <0 83000000>;
};
tcb0_clk: tcb0_clk {
#clock-cells = <0>;
reg = <35>;
atmel,clk-output-range = <0 83000000>;
};
tcb1_clk: tcb1_clk {
#clock-cells = <0>;
reg = <36>;
atmel,clk-output-range = <0 83000000>;
};
pwm_clk: pwm_clk {
#clock-cells = <0>;
reg = <38>;
atmel,clk-output-range = <0 83000000>;
};
adc_clk: adc_clk {
#clock-cells = <0>;
reg = <40>;
atmel,clk-output-range = <0 83000000>;
};
uhphs_clk: uhphs_clk {
#clock-cells = <0>;
reg = <41>;
atmel,clk-output-range = <0 83000000>;
};
udphs_clk: udphs_clk {
#clock-cells = <0>;
reg = <42>;
atmel,clk-output-range = <0 83000000>;
};
ssc0_clk: ssc0_clk {
#clock-cells = <0>;
reg = <43>;
atmel,clk-output-range = <0 83000000>;
};
ssc1_clk: ssc1_clk {
#clock-cells = <0>;
reg = <44>;
atmel,clk-output-range = <0 83000000>;
};
trng_clk: trng_clk {
#clock-cells = <0>;
reg = <47>;
atmel,clk-output-range = <0 83000000>;
};
pdmic_clk: pdmic_clk {
#clock-cells = <0>;
reg = <48>;
atmel,clk-output-range = <0 83000000>;
};
i2s0_clk: i2s0_clk {
#clock-cells = <0>;
reg = <54>;
atmel,clk-output-range = <0 83000000>;
};
i2s1_clk: i2s1_clk {
#clock-cells = <0>;
reg = <55>;
atmel,clk-output-range = <0 83000000>;