Commit 2c5b48fc authored by Dave Liu's avatar Dave Liu Committed by Kim Phillips
Browse files

mpc83xx: Remove cache config from config.h



clean up the cache config from configs.h of board
Signed-off-by: default avatarDave Liu <daveliu@freescale.com>
Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
parent fab6f556
......@@ -386,11 +386,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
#ifdef CFG_66MHZ
......
......@@ -422,15 +422,6 @@
#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
#define CFG_HID2 HID2_HBE
/*
* Cache Config
*/
#define CFG_DCACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
/*
* MMU Setup
*/
......
......@@ -481,15 +481,6 @@
#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
#define CFG_HID2 HID2_HBE
/*
* Cache Config
*/
#define CFG_DCACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
/*
* MMU Setup
*/
......
......@@ -527,13 +527,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
#if 1 /*528/264*/
......
......@@ -487,15 +487,6 @@ boards, we say we have two, but don't display a message if we find only one. */
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/*
* Cache Configuration
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log2 of the above value */
#endif
#define CFG_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
HRCWL_DDR_TO_SCB_CLK_1X1 |\
......
......@@ -511,15 +511,6 @@
#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
#define CFG_HID2 HID2_HBE
/*
* Cache Config
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
/*
* MMU Setup
*/
......
......@@ -458,15 +458,6 @@
#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
#define CFG_HID2 HID2_HBE
/*
* Cache Config
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
/*
* MMU Setup
*/
......
......@@ -378,15 +378,6 @@ extern int tqm834x_num_flash_banks;
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/*
* Cache Configuration
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
#define CFG_HRCW_LOW (\
HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
HRCWL_DDR_TO_SCB_CLK_1X1 |\
......
......@@ -490,13 +490,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
#if 1 /*528/264*/
......
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