Commit 2ef98d33 authored by Tom Rini's avatar Tom Rini

Merge branch 'master' of git://git.denx.de/u-boot-net

parents b064c912 cc259312
......@@ -15,6 +15,8 @@
#ifndef fec_h
#define fec_h
#include <phy.h>
/* Buffer descriptors used FEC.
*/
typedef struct cpm_buf_desc {
......@@ -341,10 +343,9 @@ int fecpin_setclear(struct eth_device *dev, int setclear);
void __mii_init(void);
uint mii_send(uint mii_cmd);
int mii_discover_phy(struct eth_device *dev);
int mcffec_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int mcffec_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int mcffec_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
int mcffec_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value);
#endif
#endif /* fec_h */
......@@ -73,9 +73,9 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
#define MAX_WAIT 1000
#if defined(CONFIG_CMD_MII)
int au1x00_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
int au1x00_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
unsigned short value = 0;
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
u32 mii_control;
......@@ -102,12 +102,12 @@ int au1x00_miiphy_read(const char *devname, unsigned char addr,
return -1;
}
}
*value = *mii_data_reg;
return 0;
value = *mii_data_reg;
return value;
}
int au1x00_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
int au1x00_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value)
{
volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
......@@ -290,8 +290,17 @@ int au1x00_enet_initialize(bd_t *bis){
eth_register(dev);
#if defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
au1x00_miiphy_read, au1x00_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = au1x00_miiphy_read;
mdiodev->write = au1x00_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
return 1;
......
......@@ -379,8 +379,17 @@ int fec_initialize(bd_t *bis)
#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
miiphy_register(dev->name,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
}
......
......@@ -441,8 +441,17 @@ int fec_initialize(bd_t *bis)
#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
miiphy_register(dev->name,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
}
......
......@@ -6,10 +6,12 @@
*/
#include <common.h>
#include <malloc.h>
#include <command.h>
#include <commproc.h>
#include <malloc.h>
#include <net.h>
#include <command.h>
#include <phy.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -47,10 +49,9 @@ DECLARE_GLOBAL_DATA_PTR;
static int mii_discover_phy(struct eth_device *dev);
#endif
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value);
static struct ether_fcc_info_s
{
......@@ -170,8 +171,17 @@ int fec_initialize(bd_t *bis)
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
fec8xx_miiphy_read, fec8xx_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = fec8xx_miiphy_read;
mdiodev->write = fec8xx_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
}
return 1;
......@@ -894,9 +904,9 @@ void mii_init (void)
* Otherwise they hang in mii_send() !!! Sorry!
*****************************************************************************/
int fec8xx_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
int fec8xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
unsigned short value = 0;
short rdreg; /* register working value */
#ifdef MII_DEBUG
......@@ -904,15 +914,15 @@ int fec8xx_miiphy_read(const char *devname, unsigned char addr,
#endif
rdreg = mii_send(mk_mii_read(addr, reg));
*value = rdreg;
value = rdreg;
#ifdef MII_DEBUG
printf ("0x%04x\n", *value);
printf ("0x%04x\n", value);
#endif
return 0;
return value;
}
int fec8xx_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
int fec8xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value)
{
#ifdef MII_DEBUG
printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
......
......@@ -318,8 +318,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)
return 0;
}
int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char reg,
unsigned short *value)
int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
unsigned long sta_reg;
unsigned long emac_reg;
......@@ -330,17 +329,15 @@ int emac4xx_miiphy_read (const char *devname, unsigned char addr, unsigned char
return -1;
sta_reg = in_be32((void *)EMAC0_STACR + emac_reg);
*value = sta_reg >> 16;
return 0;
return sta_reg >> 16;
}
/***********************************************************/
/* write a phy reg and return the value with a rc */
/***********************************************************/
int emac4xx_miiphy_write (const char *devname, unsigned char addr, unsigned char reg,
unsigned short value)
int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value)
{
return emac_miiphy_command(addr, reg, EMAC_STACR_WRITE, value);
}
......@@ -172,8 +172,17 @@ int last_stage_init(void)
print_fpga_info();
miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (k = 0; k < 32; ++k)
configure_gbit_phy(k);
......
......@@ -405,8 +405,17 @@ int last_stage_init(void)
}
if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_rgmii2_present)
continue;
......@@ -437,8 +446,18 @@ int last_stage_init(void)
print_fpga_info(k, false);
osd_probe(k);
if (feature_carrier_speed == CARRIER_SPEED_1G) {
miiphy_register(bb_miiphy_buses[k].name,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[k].name,
MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
setup_88e1518(bb_miiphy_buses[k].name, 0);
}
}
......
......@@ -246,8 +246,17 @@ int last_stage_init(void)
/* setup Gbit PHYs */
puts("TRANS: ");
puts(str_phys);
miiphy_register(CONFIG_SYS_GBIT_MII_BUSNAME,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII_BUSNAME, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (k = 0; k < 32; ++k) {
configure_gbit_phy(CONFIG_SYS_GBIT_MII_BUSNAME, k);
......@@ -255,8 +264,16 @@ int last_stage_init(void)
putc(slash[k % 8]);
}
miiphy_register(CONFIG_SYS_GBIT_MII1_BUSNAME,
bb_miiphy_read, bb_miiphy_write);
mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, CONFIG_SYS_GBIT_MII1_BUSNAME, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (k = 0; k < 32; ++k) {
configure_gbit_phy(CONFIG_SYS_GBIT_MII1_BUSNAME, k);
......
......@@ -162,8 +162,17 @@ int last_stage_init(void)
}
if (hw_type_cat) {
miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_rgmii2_present)
continue;
......@@ -199,8 +208,18 @@ int last_stage_init(void)
osd_probe(k + 4);
#endif
if (hw_type_cat) {
miiphy_register(bb_miiphy_buses[k].name,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[k].name,
MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
setup_88e1514(bb_miiphy_buses[k].name, 0);
}
}
......
......@@ -179,8 +179,17 @@ int last_stage_init(void)
}
if (hw_type_cat) {
miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
for (mux_ch = 0; mux_ch < MAX_MUX_CHANNELS; ++mux_ch) {
if ((mux_ch == 1) && !ch0_sgmii2_present)
continue;
......@@ -252,8 +261,18 @@ int last_stage_init(void)
dp501_probe(k, false);
#endif
if (hw_type_cat) {
miiphy_register(bb_miiphy_buses[k].name,
bb_miiphy_read, bb_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[k].name,
MDIO_NAME_LEN);
mdiodev->read = bb_miiphy_read;
mdiodev->write = bb_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
setup_88e1514(bb_miiphy_buses[k].name, 0);
}
}
......
......@@ -65,79 +65,6 @@ void miiphy_init(void)
current_mii = NULL;
}
static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
{
unsigned short val;
int ret;
struct legacy_mii_dev *ldev = bus->priv;
ret = ldev->read(bus->name, addr, reg, &val);
return ret ? -1 : (int)val;
}
static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
int reg, u16 val)
{
struct legacy_mii_dev *ldev = bus->priv;
return ldev->write(bus->name, addr, reg, val);
}
/*****************************************************************************
*
* Register read and write MII access routines for the device <name>.
* This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
*/
void miiphy_register(const char *name,
int (*read)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value),
int (*write)(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value))
{
struct mii_dev *new_dev;
struct legacy_mii_dev *ldev;
BUG_ON(strlen(name) >= MDIO_NAME_LEN);
/* check if we have unique name */
new_dev = miiphy_get_dev_by_name(name);
if (new_dev) {
printf("miiphy_register: non unique device name '%s'\n", name);
return;
}
/* allocate memory */
new_dev = mdio_alloc();
ldev = malloc(sizeof(*ldev));
if (new_dev == NULL || ldev == NULL) {
printf("miiphy_register: cannot allocate memory for '%s'\n",
name);
free(ldev);
mdio_free(new_dev);
return;
}
/* initalize mii_dev struct fields */
new_dev->read = legacy_miiphy_read;
new_dev->write = legacy_miiphy_write;
strncpy(new_dev->name, name, MDIO_NAME_LEN);
new_dev->name[MDIO_NAME_LEN - 1] = 0;
ldev->read = read;
ldev->write = write;
new_dev->priv = ldev;
debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, ldev->read, ldev->write);
/* add it to the list */
list_add_tail(&new_dev->link, &mii_devs);
if (!current_mii)
current_mii = new_dev;
}
struct mii_dev *mdio_alloc(void)
{
struct mii_dev *bus;
......
......@@ -6,5 +6,7 @@ CONFIG_TARGET_OPENRISC_GENERIC=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_NETDEVICES=y
CONFIG_ETHOC=y
CONFIG_SYS_NS16550=y
# CONFIG_AUTOBOOT is not set
......@@ -283,10 +283,9 @@ static void mal_err (struct eth_device *dev, unsigned long isr,
static void emac_err (struct eth_device *dev, unsigned long isr);
extern int phy_setup_aneg (char *devname, unsigned char addr);
extern int emac4xx_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int emac4xx_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
int emac4xx_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg);
int emac4xx_miiphy_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value);
int board_emac_count(void);
......@@ -2015,8 +2014,17 @@ int ppc_4xx_eth_initialize (bd_t * bis)
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
emac4xx_miiphy_read, emac4xx_miiphy_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = emac4xx_miiphy_read;
mdiodev->write = emac4xx_miiphy_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
if (0 == virgin) {
......
......@@ -124,6 +124,11 @@ config ETH_DESIGNWARE
100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to
provide the PHY (physical media interface).
config ETHOC
bool "OpenCores 10/100 Mbps Ethernet MAC"
help
This MAC is present in OpenRISC and Xtensa XTFPGA boards.
config MVPP2
bool "Marvell Armada 375 network interface support"
depends on ARMADA_375
......
......@@ -57,18 +57,19 @@ static int armdfec_phy_timeout(u32 *reg, u32 flag, int cond)
return !timeout;
}
static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
u16 *value)
static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad,
int phy_reg)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
u16 value = 0;
struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct armdfec_device *darmdfec = to_darmdfec(dev);
struct armdfec_reg *regs = darmdfec->regs;
u32 val;
if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) {
val = readl(&regs->phyadr);
*value = val & 0x1f;
return 0;
value = val & 0x1f;
return value;
}
/* check parameters */
......@@ -99,15 +100,15 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
return -1;
}
val = readl(&regs->smi);
*value = val & 0xffff;
value = val & 0xffff;
return 0;
return value;
}
static int smi_reg_write(const char *devname,
u8 phy_addr, u8 phy_reg, u16 value)
static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad,
int phy_reg, u16 value)
{
struct eth_device *dev = eth_get_dev_by_name(devname);
struct eth_device *dev = eth_get_dev_by_name(bus->name);
struct armdfec_device *darmdfec = to_darmdfec(dev);
struct armdfec_reg *regs = darmdfec->regs;
......@@ -711,7 +712,17 @@ int armada100_fec_register(unsigned long base_addr)
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, smi_reg_read, smi_reg_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = smi_reg_read;
mdiodev->write = smi_reg_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
return 0;
......
......@@ -159,23 +159,23 @@ at91_emac_t *get_emacbase_by_name(const char *devname)
return (at91_emac_t *) netdev->iobase;
}
int at91emac_mii_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
int at91emac_mii_read(struct mii_dev *bus, int addr, int devad, int reg)
{
unsigned short value = 0;
at91_emac_t *emac;
emac = get_emacbase_by_name(devname);
at91emac_read(emac , addr, reg, value);
return 0;
emac = get_emacbase_by_name(bus->name);
at91emac_read(emac , addr, reg, &value);
return value;
}
int at91emac_mii_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
int at91emac_mii_write(struct mii_dev *bus, int addr, int devad, int reg,
u16 value)
{
at91_emac_t *emac;
emac = get_emacbase_by_name(devname);
emac = get_emacbase_by_name(bus->name);
at91emac_write(emac, addr, reg, value);
return 0;
}
......@@ -502,7 +502,17 @@ int at91emac_register(bd_t *bis, unsigned long iobase)
eth_register(dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, at91emac_mii_read, at91emac_mii_write);
int retval;
struct mii_dev *mdiodev = mdio_alloc();
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
mdiodev->read = at91emac_mii_read;
mdiodev->write = at91emac_mii_write;
retval = mdio_register(mdiodev);
if (retval < 0)
return retval;
#endif
return 1;
}
......@@ -596,12 +596,10 @@ bool gmac_mii_busywait(unsigned int timeout)
return tmp & (1 << GMAC_MII_BUSY_SHIFT);
}
int gmac_miiphy_read(const char *devname, unsigned char phyaddr,
unsigned char reg, unsigned short *value)
int gmac_miiphy_read(struct mii_dev *bus, int phyaddr, int devad, int reg)
{
uint32_t tmp = 0;
(void)devname;
u16 value = 0;
/* Busy wait timeout is 1ms */
if (gmac_mii_busywait(1000)) {
......@@ -621,18 +619,16 @@ int gmac_miiphy_read(const char *devname, unsigned char phyaddr,
return -1;
}
*value = readl(GMAC_MII_DATA_ADDR) & 0xffff;
debug("MII read data 0x%x\n", *value);
return 0;
value = readl(GMAC_MII_DATA_ADDR) & 0xffff;
debug("MII read data 0x%x\n", value);
return value;
}
int gmac_miiphy_write(const char *devname, unsigned char phyaddr,
unsigned char reg, unsigned short value)
int gmac_miiphy_write(struct mii_dev *bus, int phyaddr, int devad, int reg,
u16 value)
{
uint32_t tmp = 0;