arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio()

Rework sysmgr_enable_warmrstcfgio() into sysmgr_config_warmrstcfgio(),
which allows both enabling and disabling the warm reset config I/O
functionality.
Signed-off-by: Marek Vasut <marex@denx.de>

arch/arm/mach-socfpga/include/mach/system_manager.h

@@ -10,7 +10,7 @@
 #ifndef __ASSEMBLY__
 
 void sysmgr_pinmux_init(void);
-void sysmgr_enable_warmrstcfgio(void);
+void sysmgr_config_warmrstcfgio(int enable);
 
 /* declaration for handoff table type */
 extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];

arch/arm/mach-socfpga/spl.c

@@ -78,7 +78,7 @@ void spl_board_init(void)
 	cm_basic_init(cm_default_cfg);
 
 	/* Enable bootrom to configure IOs. */
-	sysmgr_enable_warmrstcfgio();
+	sysmgr_config_warmrstcfgio(1);
 
 	/* configure the IOCSR / IO buffer settings */
 	if (scan_mgr_configure_iocsr())

arch/arm/mach-socfpga/system_manager.c

@@ -70,8 +70,12 @@ void sysmgr_pinmux_init(void)
 /*
  * This bit allows the bootrom to configure the IOs after a warm reset.
  */
-void sysmgr_enable_warmrstcfgio(void)
+void sysmgr_config_warmrstcfgio(int enable)
 {
-	setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
-		     SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
+	if (enable)
+		setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
+			     SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
+	else
+		clrbits_le32(&sysmgr_regs->romcodegrp_ctrl,
+			     SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
 }