Commit 4734cb78 authored by wdenk's avatar wdenk
Browse files

Patch by Gary Jennejohn, 09 Sep 2004:

allow to use USART1 as console port on at91rm9200dk boards
parent a9c37d56
......@@ -2,6 +2,9 @@
Changes since U-Boot 1.1.1:
======================================================================
* Patch by Gary Jennejohn, 09 Sep 2004:
allow to use USART1 as console port on at91rm9200dk boards
* Patch by Stefan Roese, 16 Sep 2004:
Update AR405 board.
......
......@@ -35,6 +35,10 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART1)
#error must define one of CONFIG_DBGU or CONFIG_USART1
#endif
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1(void)
{
......@@ -116,7 +120,12 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
disable_interrupts();
reset_cpu(0);
#else
#ifdef CONFIG_DBGU
AT91PS_USART us = AT91C_BASE_DBGU;
#endif
#ifdef CONFIG_USART1
AT91PS_USART us = AT91C_BASE_US1;
#endif
AT91PS_PIO pio = AT91C_BASE_PIOA;
/*shutdown the console to avoid strange chars during reset */
......
......@@ -33,8 +33,17 @@
#include <asm/io.h>
#include <asm/arch/hardware.h>
#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART1)
#error must define one of CONFIG_DBGU or CONFIG_USART1
#endif
/* ggi thunder */
#ifdef CONFIG_DBGU
AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
#endif
#ifdef CONFIG_USART1
AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1;
#endif
void serial_setbrg (void)
{
......@@ -49,8 +58,14 @@ void serial_setbrg (void)
int serial_init (void)
{
/* make any port initializations specific to this port */
#ifdef CONFIG_DBGU
*AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD; /* PA 31 & 30 */
*AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */
#endif
#ifdef CONFIG_USART1
*AT91C_PIOB_PDR = AT91C_PB21_TXD1 | AT91C_PB20_RXD1;
*AT91C_PMC_PCER |= 1 << AT91C_ID_USART1; /* enable clock */
#endif
serial_setbrg ();
us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
......
......@@ -447,6 +447,7 @@ typedef struct _AT91S_PDC {
#define AT91C_SPI_CSR ((AT91_REG *) 0xFFFE0030) /* (SPI) Chip Select Register */
#define AT91C_PMC_PCER ((AT91_REG *) 0xFFFFFC10) /* (PMC) Peripheral Clock Enable Register */
#define AT91C_PIOA_PDR ((AT91_REG *) 0xFFFFF404) /* (PIOA) PIO Disable Register */
#define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) /* (PIOB) PIO Disable Register */
#define AT91C_PIO_PA30 ((unsigned int) 1 << 30) /* Pin Controlled by PA30 */
#define AT91C_PIO_PC0 ((unsigned int) 1 << 0) /* Pin Controlled by PC0 */
......@@ -454,6 +455,10 @@ typedef struct _AT91S_PDC {
#define AT91C_PA30_DRXD ((unsigned int) AT91C_PIO_PA30) /* DBGU Debug Receive Data */
#define AT91C_PIO_PA31 ((unsigned int) 1 << 31) /* Pin Controlled by PA31 */
#define AT91C_PA31_DTXD ((unsigned int) AT91C_PIO_PA31) /* DBGU Debug Transmit Data */
#define AT91C_PIO_PB20 ((unsigned int) 1 << 20) /* Pin Controlled by PB20 */
#define AT91C_PB20_RXD1 ((unsigned int) AT91C_PIO_PB20) /* USART1 Receive Data */
#define AT91C_PIO_PB21 ((unsigned int) 1 << 21) /* Pin Controlled by PB21 */
#define AT91C_PB21_TXD1 ((unsigned int) AT91C_PIO_PB21) /* USART1 Transmit Data */
#define AT91C_ID_SYS ((unsigned int) 1) /* System Peripheral */
#define AT91C_ID_TC0 ((unsigned int) 17) /* Timer Counter 0 */
......@@ -461,6 +466,7 @@ typedef struct _AT91S_PDC {
#define AT91C_ID_SPI ((unsigned int) 13) /* Serial Peripheral Interface */
#define AT91C_ID_PIOB ((unsigned int) 3)
#define AT91C_ID_PIOC ((unsigned int) 4)
#define AT91C_ID_USART1 ((unsigned int) 7)
#define AT91C_PIO_PC1 ((unsigned int) 1 << 1) /* Pin Controlled by PC1 */
#define AT91C_PC1_BFRDY_SMOE ((unsigned int) AT91C_PIO_PC1) /* Burst Flash Ready */
......
......@@ -58,6 +58,10 @@
* Hardware drivers
*/
/* define one of these to choose the DBGU or USART1 as console */
#define CONFIG_DBGU
#undef CONFIG_USART1
#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
......
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