Commit 484919cf authored by Peter Tyser's avatar Peter Tyser Committed by Kumar Gala
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fsl_dma: Fix Channel Start bug in dma_check()

The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests.  Previously, CS was being
set, not cleared.

Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.
Signed-off-by: default avatarPeter Tyser <>
Signed-off-by: default avatarKumar Gala <>
parent 51402ac1
...@@ -60,7 +60,7 @@ static uint dma_check(void) { ...@@ -60,7 +60,7 @@ static uint dma_check(void) {
} while (status & FSL_DMA_SR_CB); } while (status & FSL_DMA_SR_CB);
/* clear MR[CS] channel start bit */ /* clear MR[CS] channel start bit */
out_be32(&dma->mr, in_be32(&dma->mr) & FSL_DMA_MR_CS); out_be32(&dma->mr, in_be32(&dma->mr) & ~FSL_DMA_MR_CS);
dma_sync(); dma_sync();
if (status != 0) if (status != 0)
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