Commit 4c681a3d authored by Jan Kiszka's avatar Jan Kiszka Committed by Tom Warren
Browse files

ARM: Factor out reusable psci_get_cpu_stack_top



This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.

CC: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarJan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: default avatarTom Rini <trini@konsulko.com>
Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
Tested-by: default avatarThierry Reding <treding@nvidia.com>
Tested-by: default avatarIan Campbell <ijc@hellion.org.uk>
Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
parent 4ce4de1e
......@@ -193,6 +193,20 @@ ENTRY(psci_cpu_off_common)
bx lr
ENDPROC(psci_cpu_off_common)
@ expects CPU ID in r0 and returns stack top in r0
ENTRY(psci_get_cpu_stack_top)
mov r5, #0x400 @ 1kB of stack per CPU
mul r0, r0, r5
ldr r5, =psci_text_end @ end of monitor text
add r5, r5, #0x2000 @ Skip two pages
lsr r5, r5, #12 @ Align to start of page
lsl r5, r5, #12
sub r0, r5, r0 @ here's our stack!
bx lr
ENDPROC(psci_get_cpu_stack_top)
ENTRY(psci_cpu_entry)
bl psci_enable_smp
......
......@@ -241,17 +241,12 @@ psci_arch_init:
mcr p15, 0, r5, c1, c1, 0 @ Write SCR
isb
bl psci_get_cpu_id
mov r5, #0x400 @ 1kB of stack per CPU
mul r0, r0, r5
adr r5, text_end @ end of text
add r5, r5, #0x2000 @ Skip two pages
lsr r5, r5, #12 @ Align to start of page
lsl r5, r5, #12
sub sp, r5, r0 @ here's our stack!
bl psci_get_cpu_id @ CPU ID => r0
bl psci_get_cpu_stack_top @ stack top => r0
mov sp, r0
bx r6
text_end:
.globl psci_text_end
psci_text_end:
.popsection
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