Commit 55dd4ba5 authored by Prafulla Wadaskar's avatar Prafulla Wadaskar Committed by Jean-Christophe PLAGNIOL-VILLARD
Browse files

Marvell Sheevaplug Board support

Reference:
http://plugcomputer.org/
http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support



This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
5. Enabled USB PHY init for kernel need
6. Boot from USB supported

Note: to boot Kirkwood kernel with USB support,
	you should add "usb start" in the boot sequence
Signed-off-by: default avatarPrafulla Wadaskar <prafulla@marvell.com>
parent 462b1038
......@@ -685,6 +685,10 @@ Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
SFFSDR ARM926EJS
Prafulla Wadaskar <prafulla@marvell.com>
sheevaplug ARM926EJS (Kirkwood SoC)
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
......
......@@ -523,6 +523,7 @@ LIST_ARM9=" \
omap730p2 \
sbc2410x \
scb9328 \
sheevaplug \
smdk2400 \
smdk2410 \
trab \
......
......@@ -2964,6 +2964,9 @@ sbc2410x_config: unconfig
scb9328_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
sheevaplug_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
smdk2400_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
......@@ -3208,7 +3211,6 @@ omap2420h4_config : unconfig
qong_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
#########################################################################
## ARM1176 Systems
#########################################################################
......
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := sheevaplug.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
TEXT_BASE = 0x00600000
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <miiphy.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "sheevaplug.h"
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
SHEEVAPLUG_OE_VAL_HIGH,
SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_UART0_RTS,
MPP9_UART0_CTS,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_SD_CLK,
MPP13_SD_CMD,
MPP14_SD_D0,
MPP15_SD_D1,
MPP16_SD_D2,
MPP17_SD_D3,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GPIO,
MPP21_GPIO,
MPP22_GPIO,
MPP23_GPIO,
MPP24_GPIO,
MPP25_GPIO,
MPP26_GPIO,
MPP27_GPIO,
MPP28_GPIO,
MPP29_TSMP9,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config);
/*
* arch number of board
*/
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
return 0;
}
int dram_init(void)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
}
return 0;
}
#ifdef CONFIG_RESET_PHY_R
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
u16 reg;
u16 devadr;
char *name = "egiga0";
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..%s could not read PHY dev address\n",
__FUNCTION__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, devadr);
printf("88E1116 Initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __SHEEVAPLUG_H
#define __SHEEVAPLUG_H
#define SHEEVAPLUG_OE_LOW (~(0))
#define SHEEVAPLUG_OE_HIGH (~(0))
#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* __SHEEVAPLUG_H */
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef _CONFIG_SHEEVAPLUG_H
#define _CONFIG_SHEEVAPLUG_H
/*
* Version number information
*/
#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug"
/*
* High Level Configuration Options (easy to change)
*/
#define CONFIG_MARVELL 1
#define CONFIG_ARM926EJS 1 /* Basic Architecture */
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KIRKWOOD 1 /* SOC Family Name */
#define CONFIG_KW88F6281 1 /* SOC Name */
#define CONFIG_MACH_SHEEVAPLUG /* Machine type */
#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
/*
* CLKs configurations
*/
#define CONFIG_SYS_HZ 1000
/*
* NS16550 Configuration
*/
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
/*
* Serial Port configuration
* The following definitions let you select what serial you want to use
* for your console driver.
*/
#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
115200,230400, 460800, 921600 }
/* auto boot */
#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
/*
* Commands configuration
*/
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
#define CONFIG_CMD_AUTOSCRIPT
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_FAT
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
/*
* NAND configuration
*/
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_KIRKWOOD
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */
#define NAND_ALLOW_ERASE_ALL 1
#endif
/*
* Environment variables configurations
*/
#ifdef CONFIG_CMD_NAND
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */
#else
#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
#endif
/*
* max 4k env size is enough, but in case of nand
* it has to be rounded to sector size
*/
#define CONFIG_ENV_SIZE 0x20000 /* 128k */
#define CONFIG_ENV_ADDR 0x40000
#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */
/*
* Default environment variables
*/
#define CONFIG_BOOTCOMMAND "${x_bootcmd_kernel}; " \
"setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
"${x_bootcmd_usb}; bootm 0x6400000;"
#define CONFIG_MTDPARTS "orion_nand:512k(uboot)," \
"3m@1m(kernel),1m@4m(psm),13m@5m(rootfs) rw\0"
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
"=ttyS0,115200 mtdparts="CONFIG_MTDPARTS \
"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x300000\0" \
"x_bootcmd_usb=usb start\0" \
"x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE 128
/*
* Other required minimal configurations
*/
#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
#define CONFIG_NR_DRAM_BANKS 4
#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/*
* Ethernet Driver configuration
*/
#ifdef CONFIG_CMD_NET
#define CONFIG_NETCONSOLE /* include NetConsole support */
#define CONFIG_NET_MULTI /* specify more that one ports available */
#define CONFIG_MII /* expose smi ove miiphy interface */
#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
#endif /* CONFIG_CMD_NET */
/*
* USB/EHCI
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI /* Enable EHCI USB support */
#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
#define CONFIG_SUPPORT_VFAT
#endif /* CONFIG_CMD_USB */
#endif /* _CONFIG_SHEEVAPLUG_H */
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment