Commit 5653fc33 authored by wdenk's avatar wdenk
Browse files

* Patch by Yuli Barcohen, 26 Jan 2004:

  Allow bzip2 compression for small memory footprint boards

* Patch by Brad Kemp, 21 Jan 2004:
  Add support for CFI flash driver for both the Intel and the AMD
  command sets.

* Patch by Travis Sawyer, 20 Jan 2004:
  Fix pci bridge auto enumeration of sibling p2p bridges.

* Patch by Tolunay Orkun, 12 Jan 2004:
  Add some delays as needed for Intel LXT971A PHY support

* Patches by Stephan Linz, 09 Jan 2004:
  - avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
  - make DK1C20 board configuration related to ASMI conform to
    documentation
parent f6e20fc6
......@@ -2,6 +2,24 @@
Changes since U-Boot 1.0.1:
======================================================================
* Patch by Yuli Barcohen, 26 Jan 2004:
Allow bzip2 compression for small memory footprint boards
* Patch by Brad Kemp, 21 Jan 2004:
Add support for CFI flash driver for both the Intel and the AMD
command sets.
* Patch by Travis Sawyer, 20 Jan 2004:
Fix pci bridge auto enumeration of sibling p2p bridges.
* Patch by Tolunay Orkun, 12 Jan 2004:
Add some delays as needed for Intel LXT971A PHY support
* Patches by Stephan Linz, 09 Jan 2004:
- avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
- make DK1C20 board configuration related to ASMI conform to
documentation
* Patch by Anders Larsen, 09 Jan 2004:
ARM memory layout fixes: the abort-stack is now set up in the
......
......@@ -1643,7 +1643,11 @@ Configuration Settings:
- CFG_FLASH_CFI:
Define if the flash driver uses extra elements in the
common flash structure for storing flash geometry
common flash structure for storing flash geometry.
- CFG_FLASH_CFI_DRIVER
This option also enables the building of the cfi_flash driver
in the drivers directory
- CFG_RX_ETH_BUFFER:
Defines the number of ethernet receive buffers. On some
......
......@@ -44,7 +44,7 @@ static int sevenseg_init_done = 0;
static inline void __sevenseg_set_masked (unsigned int mask, int value)
{
nios_pio_t *piop = (nios_pio_t*)SEVENSEG_BASE;
nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
#ifdef SEVENSEG_WRONLY /* emulate read access */
......@@ -97,7 +97,7 @@ static inline void __sevenseg_toggle_masked (unsigned int mask)
static inline void __sevenseg_set (unsigned int value)
{
nios_pio_t *piop = (nios_pio_t*)SEVENSEG_BASE;
nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
#ifdef SEVENSEG_WRONLY /* emulate read access */
......@@ -126,7 +126,7 @@ static inline void __sevenseg_set (unsigned int value)
static inline void __sevenseg_init (void)
{
nios_pio_t *piop = (nios_pio_t*)SEVENSEG_BASE;
nios_pio_t *piop __attribute__((unused)) = (nios_pio_t*)SEVENSEG_BASE;
__sevenseg_set(0);
......
......@@ -333,8 +333,14 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#ifdef CONFIG_BZIP2
case IH_COMP_BZIP2:
printf (" Uncompressing %s ... ", name);
/*
* If we've got less than 4 MB of malloc() space,
* use slower decompression algorithm which requires
* at most 2300 KB of memory.
*/
i = BZ2_bzBuffToBuffDecompress ((char*)ntohl(hdr->ih_load),
&unc_len, (char *)data, len, 0, 0);
&unc_len, (char *)data, len,
CFG_MALLOC_LEN < (4096 * 1024), 0);
if (i != BZ_OK) {
printf ("BUNZIP2 ERROR %d - must RESET board to recover\n", i);
SHOW_BOOT_PROGRESS (-6);
......
......@@ -99,7 +99,9 @@ int miiphy_reset (unsigned char addr)
#endif
return (-1);
}
#ifdef CONFIG_PHY_RESET_DELAY
udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
#endif
/*
* Poll the control register for the reset bit to go to 0 (it is
* auto-clearing). This should happen within 0.5 seconds per the
......
......@@ -113,6 +113,9 @@ int miiphy_read (unsigned char addr, unsigned char reg,
printf ("a2: write: EMAC_STACR=0x%0x\n", sta_reg); /* test-only */
#endif
#ifdef CONFIG_PHY_CMD_DELAY
udelay (CONFIG_PHY_CMD_DELAY); /* Intel LXT971A needs this */
#endif
sta_reg = in32 (EMAC_STACR);
i = 0;
while ((sta_reg & EMAC_STACR_OC) == 0) {
......@@ -173,6 +176,9 @@ int miiphy_write (unsigned char addr, unsigned char reg,
out32 (EMAC_STACR, sta_reg);
#ifdef CONFIG_PHY_CMD_DELAY
udelay (CONFIG_PHY_CMD_DELAY); /* Intel LXT971A needs this */
#endif
/* wait for completion */
i = 0;
sta_reg = in32 (EMAC_STACR);
......
......@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
LIB = libdrivers.a
OBJS = 3c589.o 5701rls.o ali512x.o \
bcm570x.o bcm570x_autoneg.o cfb_console.o \
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
cs8900.o ct69000.o dataflash.o dc2114x.o \
e1000.o eepro100.o \
i8042.o i82365.o inca-ip_sw.o \
......
This diff is collapsed.
......@@ -163,7 +163,8 @@ static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
/* Configure bus number registers */
pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus + 1);
/* TBS: passed in sub_bus is correct, removed the +1 */
pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem)
......@@ -284,6 +285,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
unsigned int sub_bus = PCI_BUS(dev);
unsigned short class;
unsigned char prg_iface;
int n;
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
......@@ -294,11 +296,19 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_io);
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
pciauto_prescan_setup_bridge(hose, dev, sub_bus);
pci_hose_scan_bus(hose, hose->current_busno);
/* TBS: Passing in current_busno allows for sibling P2P bridges */
pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
/*
* TBS: need to figure out if this is a subordinate bridge on the bus
* to be able to properly set the pri/sec/sub bridge registers.
*/
n = pci_hose_scan_bus(hose, hose->current_busno);
/* TBS: figure out the deepest we've gone for this leg */
sub_bus = max(n, sub_bus);
pciauto_postscan_setup_bridge(hose, dev, sub_bus);
sub_bus = hose->current_busno;
break;
......
......@@ -647,8 +647,8 @@
* ASMI is for Cyclone devices only and only works when the configuration
* is loaded via JTAG or ASMI. Please see doc/README.dk1c20 for details.
*----------------------------------------------------------------------*/
#define CONFIG_NIOS_ASMI /* Enable ASMI */
#define CFG_NIOS_ASMIBASE 0x00920b00 /* ASMI base address */
#define CONFIG_NIOS_ASMI /* Enable ASMI */
#define CFG_NIOS_ASMIBASE CFG_NIOS_CPU_ASMI0 /* ASMI base address */
/*------------------------------------------------------------------------
* COMMANDS
......
......@@ -42,7 +42,8 @@ typedef struct {
ulong erase_blk_tout; /* maximum block erase timeout */
ulong write_tout; /* maximum write timeout */
ulong buffer_write_tout; /* maximum buffer write timeout */
ushort vendor; /* the primary vendor id */
ushort cmd_reset; /* Vendor specific reset command */
#endif
} flash_info_t;
......@@ -61,6 +62,8 @@ typedef struct {
#define FLASH_CFI_BY32 0x04
#define FLASH_CFI_BY64 0x08
/* convert between bit value and numeric value */
#define CFI_FLASH_SHIFT_WIDTH 3
/* Prototypes */
extern unsigned long flash_init (void);
......@@ -78,6 +81,8 @@ extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
/* board/?/flash.c */
#if defined(CFG_FLASH_PROTECTION)
extern int flash_real_protect(flash_info_t *info, long sector, int prot);
extern void flash_read_user_serial(flash_info_t * info, void * buffer, int offset, int len);
extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int offset, int len);
#endif /* CFG_FLASH_PROTECTION */
/*-----------------------------------------------------------------------
......
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