Commit 566e5cf4 authored by Wolfgang Denk's avatar Wolfgang Denk

ARM: drop unsupported 'trab' board

The 'trab' board configuration is broken, and there is nobody who is
interested and willing to fix it.  Drop it.

This includes support for VFD displays which have always been used by
this board only.
Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
parent 79cfe422
......@@ -677,7 +677,6 @@ Grazvydas Ignotas <notasas@gmail.com>
Gary Jennejohn <garyj@denx.de>
smdk2400 ARM920T
trab ARM920T
Matthias Kaehlcke <matthias@kaehlcke.net>
edb9301 ARM920T (EP9301)
......
......@@ -374,7 +374,6 @@ LIST_ARM9=" \
spear320 \
spear600 \
suen3 \
trab \
VCMA9 \
versatile \
versatileab \
......
......@@ -937,29 +937,6 @@ SX1_config: unconfig
fi;
@$(MKCONFIG) -n $@ SX1 arm arm925t sx1
# TRAB default configuration: 8 MB Flash, 32 MB RAM
trab_config \
trab_bigram_config \
trab_bigflash_config \
trab_old_config: unconfig
@mkdir -p $(obj)include
@mkdir -p $(obj)board/trab
@[ -z "$(findstring _bigram,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_32MB" >>$(obj)include/config.h ; \
}
@[ -z "$(findstring _bigflash,$@)" ] || \
{ echo "#define CONFIG_FLASH_16MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@[ -z "$(findstring _old,$@)" ] || \
{ echo "#define CONFIG_FLASH_8MB" >>$(obj)include/config.h ; \
echo "#define CONFIG_RAM_16MB" >>$(obj)include/config.h ; \
echo "CONFIG_SYS_TEXT_BASE = 0x0CF40000" >$(obj)board/trab/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a trab arm arm920t trab - s3c24x0
tx25_config : unconfig
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
@$(MKCONFIG) $@ arm arm926ejs tx25 karo mx25
......@@ -1079,7 +1056,7 @@ clean:
@rm -f $(obj)board/cray/L1/{bootscript.c,bootscript.image} \
$(obj)board/matrix_vision/*/bootscript.img \
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)u-boot.lds \
$(obj)arch/blackfin/cpu/bootrom-asm-offsets.[chs]
......
......@@ -716,7 +716,6 @@ The following options need to be configured:
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
......@@ -2230,7 +2229,7 @@ FIT uImage format:
Modem Support:
--------------
[so far only for SMDK2400 and TRAB boards]
[so far only for SMDK2400 boards]
- Modem support enable:
CONFIG_MODEM_SUPPORT
......
......@@ -177,7 +177,7 @@ ulong get_tbclk(void)
{
ulong tbclk;
#if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
#if defined(CONFIG_SMDK2400)
tbclk = timer_load_val * 100;
#elif defined(CONFIG_SBC2410X) || \
defined(CONFIG_SMDK2410) || \
......@@ -198,12 +198,6 @@ void reset_cpu(ulong ignored)
{
struct s3c24x0_watchdog *watchdog;
#ifdef CONFIG_TRAB
extern void disable_vfd(void);
disable_vfd();
#endif
watchdog = s3c24x0_get_base_watchdog();
/* Disable watchdog */
......
......@@ -41,9 +41,6 @@ typedef struct global_data {
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid; /* Checksum of Environment valid? */
unsigned long fb_base; /* base address of frame buffer */
#ifdef CONFIG_VFD
unsigned char vfd_type; /* display type */
#endif
#ifdef CONFIG_FSL_ESDHC
unsigned long sdhc_clk;
#endif
......
......@@ -344,17 +344,6 @@ void board_init_f (ulong bootflag)
addr &= ~(4096 - 1);
debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
#ifdef CONFIG_VFD
# ifndef PAGE_SIZE
# define PAGE_SIZE 4096
# endif
/*
* reserve memory for VFD display (always full pages)
*/
addr -= vfd_setmem (addr);
gd->fb_base = addr;
#endif /* CONFIG_VFD */
#ifdef CONFIG_LCD
#ifdef CONFIG_FB_ADDR
gd->fb_base = CONFIG_FB_ADDR;
......@@ -533,11 +522,6 @@ void board_init_r (gd_t *id, ulong dest_addr)
/* initialize environment */
env_relocate ();
#ifdef CONFIG_VFD
/* must do this after the framebuffer is allocated */
drv_vfd_init();
#endif /* CONFIG_VFD */
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
......
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
COBJS := trab.o flash.o vfd.o cmd_trab.o memory.o tsc2000.o auto_update.o
SOBJS := lowlevel_init.o
COBJS_FKT := trab_fkt.o rs485.o tsc2000.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) $(COBJS_FKT:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
OBJS_FKT := $(addprefix $(obj),$(COBJS_FKT))
LOAD_ADDR = 0xc100000
#########################################################################
all: $(LIB) $(obj)trab_fkt.srec $(obj)trab_fkt.bin
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(call cmd_link_o_target, $(OBJS) $(SOBJS))
$(obj)trab_fkt.srec: $(OBJS_FKT) $(LIB)
$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e trab_fkt $^ $(LIB) \
-L$(obj)../../examples/standalone -lstubs \
-L$(obj)../../lib -lgeneric \
$(PLATFORM_LIBS)
$(OBJCOPY) -O srec $(<:.o=) $@
$(obj)trab_fkt.bin: $(obj)trab_fkt.srec
$(OBJCOPY) -I srec -O binary $< $@
clean:
rm -f $(SOBJS) $(OBJS) $(OBJS_FKT)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
/*
* Data file for tsc2000 driver.
* Copyright (C) 2002, 2003 DENX Software Engineering, Wolfgang Denk, wd@denx.de
*/
#ifndef _PT1000_TEMP_DATA_H
#define _PT1000_TEMP_DATA_H
long Pt1000_temp_table[][2] = {
/* For quick range checking the largest element
* is placed at index 0.
* U, nV T, C*100
*/
{ 44000000 , 12165 },
{ -10000000 , -2644 },
{ -9000000 , -2381 },
{ -8000000 , -2118 },
{ -7000000 , -1855 },
{ -6000000 , -1591 },
{ -5000000 , -1327 },
{ -4000000 , -1063 },
{ -3000000 , -798 },
{ -2000000 , -532 },
{ -1000000 , -266 },
{ 0 , 000 },
{ 1000000 , 267 },
{ 2000000 , 534 },
{ 3000000 , 802 },
{ 4000000 , 1070 },
{ 5000000 , 1338 },
{ 6000000 , 1607 },
{ 7000000 , 1876 },
{ 8000000 , 2146 },
{ 9000000 , 2416 },
{ 10000000 , 2687 },
{ 11000000 , 2958 },
{ 12000000 , 3230 },
{ 13000000 , 3502 },
{ 14000000 , 3774 },
{ 15000000 , 4047 },
{ 16000000 , 4321 },
{ 17000000 , 4595 },
{ 18000000 , 4869 },
{ 19000000 , 5144 },
{ 20000000 , 5419 },
{ 21000000 , 5694 },
{ 22000000 , 5971 },
{ 23000000 , 6247 },
{ 24000000 , 6524 },
{ 25000000 , 6802 },
{ 26000000 , 7080 },
{ 27000000 , 7358 },
{ 28000000 , 7637 },
{ 29000000 , 7916 },
{ 30000000 , 8196 },
{ 31000000 , 8476 },
{ 32000000 , 8757 },
{ 33000000 , 9039 },
{ 34000000 , 9320 },
{ 35000000 , 9602 },
{ 36000000 , 9885 },
{ 37000000 , 10168 },
{ 38000000 , 10452 },
{ 39000000 , 10736 },
{ 40000000 , 11021 },
{ 41000000 , 11306 },
{ 42000000 , 11592 },
{ 43000000 , 11879 },
{ 44000000 , 12165 },
};
#endif /* _PT1000_TEMP_DATA_H */
The TRAB keyboard implementation is similar to that for LWMON and
R360MPI boards. The only difference concerns key naming. There are 4
keys on TRAB: 1, 2, 3, 4.
1) The "kbd" command provides information about the current state of
the keys. For example,
TRAB # kbd
Keys: 1 0 1 0
means that keys 1 and 3 are pressed. The keyboard status is also
stored in the "keybd" environment variable. In this example we get
keybd=1010
2) The "preboot" variable is set according to current environment
settings and keys pressed. This is an example:
TRAB # setenv magic_keys XY
TRAB # setenv key_magicX 12
TRAB # setenv key_cmdX echo ## Keys 1 + 2 pressed ##\;echo
TRAB # setenv key_magicY 13
TRAB # setenv key_cmdY echo ## Keys 1 + 3 pressed ##\;echo
Here "magic_keys=XY" means that the "key_magicX" and "key_magicY"
variables will be checked for a match. Each variable "key_magic*"
defines a set of keys. In the our example, if keys 1 and 3 are
pressed during reset, then "key_magicY" matches, so the "preboot"
variable will be set to the contents of "key_cmdY":
preboot=echo ## Keys 1 + 3 pressed ##;echo
3) The TRAB board has optional modem support. When a certain key
combination is pressed on the keyboard at power-on, the firmware
performs the necessary initialization of the modem and allows for
dial-in. The key combination is specified in the
"include/configs/trab.h" file. For example:
#define CONFIG_MODEM_KEY_MAGIC "23"
means that modem will be initialized if and only if both keys 2, 3
are pressed. Note that the format of this string is similar to the
format of "key_magic*" environment variables described above.
This diff is collapsed.
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#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# TRAB board with S3C2400X (arm920t) cpu
#
# see http://www.samsung.com/ for more information on SAMSUNG
#
#
# TRAB has 1 bank of 16 MB or 32 MB DRAM
#
# 0c00'0000 to 0e00'0000
#
# Linux-Kernel is expected to be at 0c00'8000, entry 0c00'8000
#
# we load ourself to 0CF0'0000 / 0DF0'0000
#
# download areas is 0C80'0000
#
sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
ifndef CONFIG_SYS_TEXT_BASE
CONFIG_SYS_TEXT_BASE = 0x0DF40000
endif
This diff is collapsed.
/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* Modified for the TRAB board by
* (C) Copyright 2002-2003
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
/* some parameters for the board */
/*
*
* Copied from linux/arch/arm/boot/compressed/head-s3c2400.S
*
* Copyright (C) 2001 Samsung Electronics by chc, 010406
*
* TRAB specific tweaks.
*
*/
/* memory controller */
#define BWSCON 0x14000000
/* Bank0 */
#define B0_Tacs 0x1 /* 1 clk */
#define B0_Tcos 0x1 /* 1 clk */
#define B0_Tacc 0x5 /* 8 clk */
#define B0_Tcoh 0x1 /* 1 clk */
#define B0_Tah 0x1 /* 1 clk */
#define B0_Tacp 0x0
#define B0_PMC 0x0 /* normal */
/* Bank1 - SRAM */
#define B1_Tacs 0x1 /* 1 clk */
#define B1_Tcos 0x1 /* 1 clk */
#define B1_Tacc 0x5 /* 8 clk */
#define B1_Tcoh 0x1 /* 1 clk */
#define B1_Tah 0x1 /* 1 clk */
#define B1_Tacp 0x0
#define B1_PMC 0x0 /* normal */
/* Bank2 - CPLD */
#define B2_Tacs 0x1 /* 1 clk */
#define B2_Tcos 0x1 /* 1 clk */
#define B2_Tacc 0x5 /* 8 clk */
#define B2_Tcoh 0x1 /* 1 clk */
#define B2_Tah 0x1 /* 1 clk */
#define B2_Tacp 0x0
#define B2_PMC 0x0 /* normal */
/* Bank3 - setup for the cs8900 */
#define B3_Tacs 0x3 /* 4 clk */
#define B3_Tcos 0x3 /* 4 clk */
#define B3_Tacc 0x7 /* 14 clk */
#define B3_Tcoh 0x1 /* 1 clk */
#define B3_Tah 0x0 /* 0 clk */
#define B3_Tacp 0x3 /* 6 clk */
#define B3_PMC 0x0 /* normal */
/* Bank4 */
#define B4_Tacs 0x0 /* 0 clk */
#define B4_Tcos 0x0 /* 0 clk */
#define B4_Tacc 0x7 /* 14 clk */
#define B4_Tcoh 0x0 /* 0 clk */
#define B4_Tah 0x0 /* 0 clk */
#define B4_Tacp 0x0
#define B4_PMC 0x0 /* normal */
/* Bank5 */
#define B5_Tacs 0x0 /* 0 clk */
#define B5_Tcos 0x0 /* 0 clk */
#define B5_Tacc 0x7 /* 14 clk */
#define B5_Tcoh 0x0 /* 0 clk */
#define B5_Tah 0x0 /* 0 clk */
#define B5_Tacp 0x0
#define B5_PMC 0x0 /* normal */
#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
/* Bank6 */
#define B6_MT 0x3 /* SDRAM */
#define B6_Trcd 0x0 /* 2clk */
#define B6_SCAN 0x1 /* 9 bit */
/* Bank7 */
#define B7_MT 0x3 /* SDRAM */
#define B7_Trcd 0x0 /* 2clk */
#define B7_SCAN 0x1 /* 9 bit */
#else /* CONFIG_RAM_16MB = 16 MB RAM */
/* Bank6 */
#define B6_MT 0x3 /* SDRAM */
#define B6_Trcd 0x1 /* 2clk */
#define B6_SCAN 0x0 /* 8 bit */
/* Bank7 */
#define B7_MT 0x3 /* SDRAM */
#define B7_Trcd 0x1 /* 2clk */
#define B7_SCAN 0x0 /* 8 bit */
#endif /* CONFIG_RAM_16MB */
/* refresh parameter */
#define REFEN 0x1 /* enable refresh */
#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */
#define Trp 0x0 /* 2 clk */
#define Trc 0x3 /* 7 clk */
#define Tchr 0x2 /* 3 clk */
#ifdef CONFIG_TRAB_50MHZ
#define REFCNT 1269 /* period=15.6 us, HCLK=50Mhz, (2048+1-15.6*50) */
#else
#define REFCNT 1011 /* period=15.6 us, HCLK=66.5Mhz, (2048+1-15.6*66.5) */
#endif
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
ldr r0, =SMRDATA
ldr r1, _TEXT_BASE
sub r0, r0, r1
ldr r1, =BWSCON /* Bus Width Status Controller */
add r2, r0, #52
0:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r2, r0
bne 0b
/* everything is fine now */
mov pc, lr
.ltorg
/* the literal pools origin */
SMRDATA:
.word 0x2211d644 /* d->Ethernet, 6->CPLD, 4->SRAM, 4->FLASH */
.word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) /* GCS0 */
.word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) /* GCS1 */
.word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) /* GCS2 */
.word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) /* GCS3 */
.word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) /* GCS4 */
.word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) /* GCS5 */
.word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) /* GCS6 */
.word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) /* GCS7 */
.word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
#ifndef CONFIG_RAM_16MB /* 32 MB RAM */
.word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */
#else /* CONFIG_RAM_16MB = 16 MB RAM */
.word 0x17 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */
#endif /* CONFIG_RAM_16MB */
.word 0x20 /* MRSR6, CL=2clk */
.word 0x20 /* MRSR7 */
This diff is collapsed.
/*
* (C) Copyright 2003
* Martin Krause, TQ-Systems GmbH, <martin.krause@tqs.de>
*
* Based on arch/arm/cpu/arm920t/serial.c, by Gary Jennejohn
* (C) Copyright 2002 Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/arch/s3c24x0_cpu.h>
#include "rs485.h"
static void rs485_setbrg (void);
static void rs485_cfgio (void);
static void set_rs485re(unsigned char rs485re_state);
static void set_rs485de(unsigned char rs485de_state);
static void rs485_setbrg (void);
#ifdef NOT_USED
static void trab_rs485_disable_tx(void);
static void trab_rs485_disable_rx(void);
#endif
#define UART_NR S3C24X0_UART1
/* CPLD-Register for controlling TRAB hardware functions */
#define CPLD_RS485_RE ((volatile unsigned long *)0x04028000)
static void rs485_setbrg (void)
{
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
int i;
unsigned int reg = 0;
/* value is calculated so : (int)(PCLK/16./baudrate) -1 */
/* reg = (33000000 / (16 * gd->baudrate)) - 1; */
reg = (33000000 / (16 * 38400)) - 1;
/* FIFO enable, Tx/Rx FIFO clear */
uart->ufcon = 0x07;
uart->umcon = 0x0;
/* Normal,No parity,1 stop,8 bit */
uart->ulcon = 0x3;
/*
* tx=level,rx=edge,disable timeout int.,enable rx error int.,
* normal,interrupt or polling
*/
uart->ucon = 0x245;
uart->ubrdiv = reg;
for (i = 0; i < 100; i++);
}
static void rs485_cfgio (void)
{
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
gpio->pfcon &= ~(0x3 << 2);
gpio->pfcon |= (0x2 << 2); /* configure GPF1 as RXD1 */
gpio->pfcon &= ~(0x3 << 6);
gpio->pfcon |= (0x2 << 6); /* configure GPF3 as TXD1 */
gpio->pfup |= (1 << 1); /* disable pullup on GPF1 */
gpio->pfup |= (1 << 3); /* disable pullup on GPF3 */
gpio->pacon &= ~(1 << 11); /* set GPA11 (RS485_DE) to output */
}
/*
* Initialise the rs485 port with the given baudrate. The settings
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*
*/
int rs485_init (void)
{
rs485_cfgio ();
rs485_setbrg ();
return (0);
}
/*
* Read a single byte from the rs485 port. Returns 1 on success, 0
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
int rs485_getc (void)
{
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
/* wait for character to arrive */
while (!(uart->utrstat & 0x1))
;
return uart->urxh & 0xff;
}
/*
* Output a single byte to the rs485 port.
*/
void rs485_putc (const char c)
{
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
/* wait for room in the tx FIFO */
while (!(uart->utrstat & 0x2))
;
uart->utxh = c;
/* If \n, also do \r */
if (c == '\n')
rs485_putc ('\r');
}
/*
* Test whether a character is in the RX buffer
*/
int rs485_tstc (void)
{
struct s3c24x0_uart * const uart = s3c24x0_get_base_uart(UART_NR);
return uart->utrstat & 0x1;
}
void rs485_puts (const char *s)
{
while (*s) {
rs485_putc (*s++);
}
}
/*
* State table:
* RE DE Result
* 1 1 XMIT
* 0 0 RCV
* 1 0 Shutdown
*/
/* function that controls the receiver enable for the rs485 */
/* rs485re_state reflects the level (0/1) of the RE pin */
static void set_rs485re(unsigned char rs485re_state)
{
if(rs485re_state)
*CPLD_RS485_RE = 0x010000;
else
*CPLD_RS485_RE = 0x0;
}
/* function that controls the sender enable for the rs485 */
/* rs485de_state reflects the level (0/1) of the DE pin */
static void set_rs485de(unsigned char rs485de_state)
{
struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
/* This is on PORT A bit 11 */
if(rs485de_state)
gpio->padat |= (1 << 11);
else
gpio->padat &= ~(1 << 11);
}