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Librem5
uboot-imx
Commits
5ea67393
Commit
5ea67393
authored
Jun 11, 2008
by
Wolfgang Denk
Browse files
Merge branch 'master' of
git://www.denx.de/git/u-boot-mpc85xx
Conflicts: include/asm-ppc/fsl_lbc.h Signed-off-by:
Wolfgang Denk
<
wd@denx.de
>
parents
2395db48
ba04f701
Changes
101
Hide whitespace changes
Inline
Side-by-side
MAKEALL
View file @
5ea67393
...
...
@@ -361,6 +361,7 @@ LIST_85xx=" \
stxssa
\
TQM8540
\
TQM8541
\
TQM8548
\
TQM8555
\
TQM8560
\
"
...
...
Makefile
View file @
5ea67393
...
...
@@ -486,7 +486,7 @@ PATI_config: unconfig
#########################################################################
aev_config
:
unconfig
@
$(MKCONFIG)
-a
aev ppc mpc5xxx tqm5200
@
$(MKCONFIG)
-a
aev ppc mpc5xxx tqm5200
tqc
BC3450_config
:
unconfig
@
$(MKCONFIG)
-a
BC3450 ppc mpc5xxx bc3450
...
...
@@ -640,13 +640,13 @@ PM520_ROMBOOT_DDR_config: unconfig
@
$(MKCONFIG)
-a
PM520 ppc mpc5xxx pm520
smmaco4_config
:
unconfig
@
$(MKCONFIG)
-a
smmaco4 ppc mpc5xxx tqm5200
@
$(MKCONFIG)
-a
smmaco4 ppc mpc5xxx tqm5200
tqc
cm5200_config
:
unconfig
@
$(MKCONFIG)
-a
cm5200 ppc mpc5xxx cm5200
spieval_config
:
unconfig
@
$(MKCONFIG)
-a
spieval ppc mpc5xxx tqm5200
@
$(MKCONFIG)
-a
spieval ppc mpc5xxx tqm5200
tqc
TB5200_B_config
\
TB5200_config
:
unconfig
...
...
@@ -655,7 +655,7 @@ TB5200_config: unconfig
{
echo
"#define CONFIG_TQM5200_B"
>>
$(obj)
include/config.h
;
\
$(XECHO)
"... with MPC5200B processor"
;
\
}
@
$(MKCONFIG)
-n
$@
-a
TB5200 ppc mpc5xxx tqm5200
@
$(MKCONFIG)
-n
$@
-a
TB5200 ppc mpc5xxx tqm5200
tqc
MINI5200_config
\
EVAL5200_config
\
...
...
@@ -704,7 +704,7 @@ TQM5200_B_HIGHBOOT_config \
TQM5200_config
\
TQM5200_STK100_config
:
unconfig
@
mkdir
-p
$(obj)
include
@
mkdir
-p
$(obj)
board/tqm5200
@
mkdir
-p
$(obj)
board/
tqc/
tqm5200
@
[
-z
"
$(
findstring
cam5200,
$@
)
"
]
||
\
{
echo
"#define CONFIG_CAM5200"
>>
$(obj)
include/config.h
;
\
echo
"#define CONFIG_TQM5200S"
>>
$(obj)
include/config.h
;
\
...
...
@@ -737,7 +737,7 @@ TQM5200_STK100_config: unconfig
@
[
-z
"
$(
findstring
HIGHBOOT,
$@
)
"
]
||
\
{
echo
"TEXT_BASE = 0xFFF00000"
>
$(obj)
board/tqm5200/config.tmp
;
\
}
@
$(MKCONFIG)
-n
$@
-a
TQM5200 ppc mpc5xxx tqm5200
@
$(MKCONFIG)
-n
$@
-a
TQM5200 ppc mpc5xxx tqm5200
tqc
uc101_config
:
unconfig
@
$(MKCONFIG)
uc101 ppc mpc5xxx uc101
motionpro_config
:
unconfig
...
...
@@ -830,7 +830,7 @@ hermes_config : unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx hermes
HMI10_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx tqm8xx
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx tqm8xx
tqc
IAD210_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx IAD210 siemens
...
...
@@ -1059,7 +1059,7 @@ RRvision_LCD_config: unconfig
@
$(MKCONFIG)
-a
RRvision ppc mpc8xx RRvision
SM850_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx tqm8xx
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx tqm8xx
tqc
spc1920_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx spc1920
...
...
@@ -1109,13 +1109,13 @@ virtlab2_config: unconfig
echo
"#define CONFIG_NEC_NL6448BC20"
>>
$(obj)
include/config.h
;
\
$(XECHO)
"... with LCD display"
;
\
}
@
$(MKCONFIG)
-a
$(
call
xtract_8xx,
$@
)
ppc mpc8xx tqm8xx
@
$(MKCONFIG)
-a
$(
call
xtract_8xx,
$@
)
ppc mpc8xx tqm8xx
tqc
TTTech_config
:
unconfig
@
mkdir
-p
$(obj)
include
@
echo
"#define CONFIG_LCD"
>
$(obj)
include/config.h
@
echo
"#define CONFIG_SHARP_LQ104V7DS01"
>>
$(obj)
include/config.h
@
$(MKCONFIG)
-a
TQM823L ppc mpc8xx tqm8xx
@
$(MKCONFIG)
-a
TQM823L ppc mpc8xx tqm8xx
tqc
uc100_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc8xx uc100
...
...
@@ -1130,7 +1130,7 @@ wtk_config: unconfig
@
mkdir
-p
$(obj)
include
@
echo
"#define CONFIG_LCD"
>
$(obj)
include/config.h
@
echo
"#define CONFIG_SHARP_LQ065T9DR51U"
>>
$(obj)
include/config.h
@
$(MKCONFIG)
-a
TQM823L ppc mpc8xx tqm8xx
@
$(MKCONFIG)
-a
TQM823L ppc mpc8xx tqm8xx
tqc
#########################################################################
## PPC4xx Systems
...
...
@@ -1784,10 +1784,10 @@ TQM8265_AA_config: unconfig
echo
"#undef CONFIG_BUSMODE_60x"
>>
$(obj)
include/config.h
;
\
$(XECHO)
"... without 60x Bus Mode"
;
\
fi
@
$(MKCONFIG)
-a
TQM8260 ppc mpc8260 tqm8260
@
$(MKCONFIG)
-a
TQM8260 ppc mpc8260 tqm8260
tqc
TQM8272_config
:
unconfig
@
$(MKCONFIG)
TQM8272 ppc mpc8260 tqm8272
@
$(MKCONFIG)
TQM8272 ppc mpc8260 tqm8272
tqc
VoVPN-GW_66MHz_config
\
VoVPN-GW_100MHz_config
:
unconfig
...
...
@@ -2114,7 +2114,7 @@ sbc8349_config: unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc83xx sbc8349
TQM834x_config
:
unconfig
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc83xx tqm834x
@
$(MKCONFIG)
$
(
@:_config
=)
ppc mpc83xx tqm834x
tqc
#########################################################################
...
...
@@ -2233,6 +2233,7 @@ stxssa_4M_config: unconfig
TQM8540_config
\
TQM8541_config
\
TQM8548_config
\
TQM8555_config
\
TQM8560_config
:
unconfig
@
mkdir
-p
$(obj)
include
...
...
@@ -2241,9 +2242,8 @@ TQM8560_config: unconfig
echo
"#define CONFIG_MPC
$
${CTYPE}
"
>>
$(obj)
include/config.h
;
\
echo
"#define CONFIG_TQM
$
${CTYPE}
"
>>
$(obj)
include/config.h
;
\
echo
"#define CONFIG_HOSTNAME tqm
$
${CTYPE}
"
>>
$(obj)
include/config.h
;
\
echo
"#define CONFIG_BOARDNAME
\"
TQM
$
${CTYPE}
\"
"
>>
$(obj)
include/config.h
;
\
echo
"#define CFG_BOOTFILE_PATH
\"
/tftpboot/tqm
$
${CTYPE}
/uImage
\"
"
>>
$(obj)
include/config.h
@
$(MKCONFIG)
-a
TQM85xx ppc mpc85xx tqm85xx
echo
"#define CONFIG_BOARDNAME
\"
TQM
$
${CTYPE}
\"
"
>>
$(obj)
include/config.h
;
@
$(MKCONFIG)
-a
TQM85xx ppc mpc85xx tqm85xx tqc
#########################################################################
## MPC86xx Systems
...
...
board/atum8548/law.c
View file @
5ea67393
...
...
@@ -48,14 +48,14 @@
*/
struct
law_entry
law_table
[]
=
{
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_1
),
SET_LAW
_ENTRY
(
3
,
CFG_PCI1_IO_PHYS
,
LAWAR_SIZE_1M
,
LAW_TRGT_IF_PCI_1
),
SET_LAW
_ENTRY
(
4
,
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
_ENTRY
(
5
,
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
_ENTRY
(
6
,
CFG_PCIE1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
_ENTRY
(
7
,
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_1
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAWAR_SIZE_1M
,
LAW_TRGT_IF_PCI_1
),
SET_LAW
(
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCIE1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCIE_1
),
/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
SET_LAW
_ENTRY
(
8
,
CFG_LBC_CACHE_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_LBC_CACHE_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8540ads/law.c
View file @
5ea67393
...
...
@@ -46,13 +46,13 @@
struct
law_entry
law_table
[]
=
{
#ifndef CONFIG_SPD_EEPROM
SET_LAW
_ENTRY
(
1
,
CFG_DDR_SDRAM_BASE
,
LAW_SIZE_128M
,
LAW_TRGT_IF_DDR
),
SET_LAW
(
CFG_DDR_SDRAM_BASE
,
LAW_SIZE_128M
,
LAW_TRGT_IF_DDR
),
#endif
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
/* This is not so much the SDRAM map as it is the whole localbus map. */
SET_LAW
_ENTRY
(
3
,
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
_ENTRY
(
4
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
5
,
CFG_RIO_MEM_BASE
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_RIO
),
SET_LAW
(
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_RIO_MEM_BASE
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_RIO
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8540ads/mpc8540ads.c
View file @
5ea67393
...
...
@@ -41,12 +41,6 @@ void local_bus_init(void);
void
sdram_init
(
void
);
long
int
fixed_sdram
(
void
);
int
board_early_init_f
(
void
)
{
return
0
;
}
int
checkboard
(
void
)
{
puts
(
"Board: ADS
\n
"
);
...
...
@@ -230,42 +224,6 @@ sdram_init(void)
udelay
(
100
);
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;
printf
(
"SDRAM test phase 1:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0xaaaaaaaa
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0xaaaaaaaa
)
{
printf
(
"SDRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"SDRAM test phase 2:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0x55555555
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0x55555555
)
{
printf
(
"SDRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"SDRAM test passed.
\n
"
);
return
0
;
}
#endif
#if !defined(CONFIG_SPD_EEPROM)
/*************************************************************************
* fixed sdram init -- doesn't use serial presence detect.
...
...
board/freescale/mpc8541cds/law.c
View file @
5ea67393
...
...
@@ -47,12 +47,12 @@
*/
struct
law_entry
law_table
[]
=
{
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
3
,
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
_ENTRY
(
4
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
5
,
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
SET_LAW
_ENTRY
(
6
,
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8541cds/mpc8541cds.c
View file @
5ea67393
...
...
@@ -196,11 +196,6 @@ const iop_conf_t iop_conf_tab[4][32] = {
}
};
int
board_early_init_f
(
void
)
{
return
0
;
}
int
checkboard
(
void
)
{
volatile
ccsr_gur_t
*
gur
=
(
void
*
)(
CFG_MPC85xx_GUTS_ADDR
);
...
...
@@ -425,45 +420,6 @@ sdram_init(void)
#endif
/* enable SDRAM init */
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;
printf
(
"Testing DRAM from 0x%08x to 0x%08x
\n
"
,
CFG_MEMTEST_START
,
CFG_MEMTEST_END
);
printf
(
"DRAM test phase 1:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0xaaaaaaaa
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0xaaaaaaaa
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test phase 2:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0x55555555
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0x55555555
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test passed.
\n
"
);
return
0
;
}
#endif
#if defined(CONFIG_PCI)
/* For some reason the Tundra PCI bridge shows up on itself as a
* different device. Work around that by refusing to configure it.
...
...
board/freescale/mpc8544ds/law.c
View file @
5ea67393
...
...
@@ -28,15 +28,15 @@
#include <asm/mmu.h>
struct
law_entry
law_table
[]
=
{
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
3
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
4
,
CFG_LBC_CACHE_BASE
,
LAWAR_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
_ENTRY
(
5
,
CFG_PCIE1_MEM_PHYS
,
LAWAR_SIZE_256M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
_ENTRY
(
6
,
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
_ENTRY
(
7
,
CFG_PCIE2_MEM_PHYS
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_PCIE_2
),
SET_LAW
_ENTRY
(
8
,
CFG_PCIE2_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCIE_2
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_LBC_CACHE_BASE
,
LAWAR_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_PCIE1_MEM_PHYS
,
LAWAR_SIZE_256M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCIE2_MEM_PHYS
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_PCIE_2
),
SET_LAW
(
CFG_PCIE2_IO_PHYS
,
LAW_SIZE_64K
,
LAW_TRGT_IF_PCIE_2
),
/* contains both PCIE3 MEM & IO space */
SET_LAW
_ENTRY
(
9
,
CFG_PCIE3_MEM_PHYS
,
LAW_SIZE_4M
,
LAW_TRGT_IF_PCIE_3
),
SET_LAW
(
CFG_PCIE3_MEM_PHYS
,
LAW_SIZE_4M
,
LAW_TRGT_IF_PCIE_3
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8544ds/mpc8544ds.c
View file @
5ea67393
...
...
@@ -40,11 +40,6 @@ extern void ddr_enable_ecc(unsigned int dram_size);
void
sdram_init
(
void
);
int
board_early_init_f
(
void
)
{
return
0
;
}
int
checkboard
(
void
)
{
volatile
ccsr_gur_t
*
gur
=
(
void
*
)(
CFG_MPC85xx_GUTS_ADDR
);
...
...
@@ -83,45 +78,6 @@ initdram(int board_type)
return
dram_size
;
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;
printf
(
"Testing DRAM from 0x%08x to 0x%08x
\n
"
,
CFG_MEMTEST_START
,
CFG_MEMTEST_END
);
printf
(
"DRAM test phase 1:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0xaaaaaaaa
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0xaaaaaaaa
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test phase 2:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0x55555555
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0x55555555
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test passed.
\n
"
);
return
0
;
}
#endif
#ifdef CONFIG_PCI1
static
struct
pci_controller
pci1_hose
;
#endif
...
...
board/freescale/mpc8548cds/law.c
View file @
5ea67393
...
...
@@ -52,21 +52,21 @@
struct
law_entry
law_table
[]
=
{
#ifdef CFG_PCI1_MEM_PHYS
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
3
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
#endif
#ifdef CFG_PCI2_MEM_PHYS
SET_LAW
_ENTRY
(
4
,
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
_ENTRY
(
5
,
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
#endif
#ifdef CFG_PCIE1_MEM_PHYS
SET_LAW
_ENTRY
(
6
,
CFG_PCIE1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
_ENTRY
(
7
,
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCIE1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCIE_1
),
SET_LAW
(
CFG_PCIE1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCIE_1
),
#endif
/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
SET_LAW
_ENTRY
(
8
,
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
#ifdef CFG_RIO_MEM_PHYS
SET_LAW
_ENTRY
(
9
,
CFG_RIO_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_RIO
),
SET_LAW
(
CFG_RIO_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_RIO
),
#endif
};
...
...
board/freescale/mpc8548cds/mpc8548cds.c
View file @
5ea67393
...
...
@@ -45,11 +45,6 @@ DECLARE_GLOBAL_DATA_PTR;
void
local_bus_init
(
void
);
void
sdram_init
(
void
);
int
board_early_init_f
(
void
)
{
return
0
;
}
int
checkboard
(
void
)
{
volatile
ccsr_gur_t
*
gur
=
(
void
*
)(
CFG_MPC85xx_GUTS_ADDR
);
...
...
@@ -250,45 +245,6 @@ sdram_init(void)
#endif
/* enable SDRAM init */
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;
printf
(
"Testing DRAM from 0x%08x to 0x%08x
\n
"
,
CFG_MEMTEST_START
,
CFG_MEMTEST_END
);
printf
(
"DRAM test phase 1:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0xaaaaaaaa
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0xaaaaaaaa
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test phase 2:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0x55555555
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0x55555555
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test passed.
\n
"
);
return
0
;
}
#endif
#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
/* For some reason the Tundra PCI bridge shows up on itself as a
* different device. Work around that by refusing to configure it.
...
...
board/freescale/mpc8555cds/law.c
View file @
5ea67393
...
...
@@ -47,12 +47,12 @@
*/
struct
law_entry
law_table
[]
=
{
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
3
,
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
_ENTRY
(
4
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
5
,
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI2_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI_2
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI2_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI_2
),
/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
SET_LAW
_ENTRY
(
6
,
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8555cds/mpc8555cds.c
View file @
5ea67393
...
...
@@ -194,11 +194,6 @@ const iop_conf_t iop_conf_tab[4][32] = {
}
};
int
board_early_init_f
(
void
)
{
return
0
;
}
int
checkboard
(
void
)
{
volatile
ccsr_gur_t
*
gur
=
(
void
*
)(
CFG_MPC85xx_GUTS_ADDR
);
...
...
@@ -422,45 +417,6 @@ sdram_init(void)
#endif
/* enable SDRAM init */
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;
printf
(
"Testing DRAM from 0x%08x to 0x%08x
\n
"
,
CFG_MEMTEST_START
,
CFG_MEMTEST_END
);
printf
(
"DRAM test phase 1:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0xaaaaaaaa
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0xaaaaaaaa
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test phase 2:
\n
"
);
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
*
p
=
0x55555555
;
for
(
p
=
pstart
;
p
<
pend
;
p
++
)
{
if
(
*
p
!=
0x55555555
)
{
printf
(
"DRAM test fails at: %08x
\n
"
,
(
uint
)
p
);
return
1
;
}
}
printf
(
"DRAM test passed.
\n
"
);
return
0
;
}
#endif
#ifdef CONFIG_PCI
/* For some reason the Tundra PCI bridge shows up on itself as a
* different device. Work around that by refusing to configure it
...
...
board/freescale/mpc8560ads/law.c
View file @
5ea67393
...
...
@@ -46,13 +46,13 @@
struct
law_entry
law_table
[]
=
{
#ifndef CONFIG_SPD_EEPROM
SET_LAW
_ENTRY
(
1
,
CFG_DDR_SDRAM_BASE
,
LAW_SIZE_128M
,
LAW_TRGT_IF_DDR
),
SET_LAW
(
CFG_DDR_SDRAM_BASE
,
LAW_SIZE_128M
,
LAW_TRGT_IF_DDR
),
#endif
SET_LAW
_ENTRY
(
2
,
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_PCI1_MEM_PHYS
,
LAW_SIZE_512M
,
LAW_TRGT_IF_PCI
),
/* This is not so much the SDRAM map as it is the whole localbus map. */
SET_LAW
_ENTRY
(
3
,
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
_ENTRY
(
4
,
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
_ENTRY
(
5
,
CFG_RIO_MEM_BASE
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_RIO
),
SET_LAW
(
CFG_LBC_SDRAM_BASE
,
LAW_SIZE_256M
,
LAW_TRGT_IF_LBC
),
SET_LAW
(
CFG_PCI1_IO_PHYS
,
LAW_SIZE_1M
,
LAW_TRGT_IF_PCI
),
SET_LAW
(
CFG_RIO_MEM_BASE
,
LAWAR_SIZE_512M
,
LAW_TRGT_IF_RIO
),
};
int
num_law_entries
=
ARRAY_SIZE
(
law_table
);
board/freescale/mpc8560ads/mpc8560ads.c
View file @
5ea67393
...
...
@@ -212,12 +212,6 @@ typedef struct bcsr_ {
volatile
unsigned
char
bcsr5
;
}
bcsr_t
;
int
board_early_init_f
(
void
)
{
return
0
;
}
void
reset_phy
(
void
)
{
#if defined(CONFIG_ETHER_ON_FCC)
/* avoid compile warnings for now */
...
...
@@ -433,42 +427,6 @@ sdram_init(void)
udelay
(
100
);
}
#if defined(CFG_DRAM_TEST)
int
testdram
(
void
)
{
uint
*
pstart
=
(
uint
*
)
CFG_MEMTEST_START
;
uint
*
pend
=
(
uint
*
)
CFG_MEMTEST_END
;
uint
*
p
;