Commit 6dd652fa authored by wdenk's avatar wdenk
Browse files

Patches by Murray Jensen, 17 Jun 2003:

- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
  "common/main.c" can use the "reset_cmd_timeout()" function before
  entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
  slightly different. see include/configs/hymod.h for an example
  (requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
  CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
  behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
  function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
  after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
  config.mk to allow board configurations to override the GNU
  linker script, selected via the LDSCRIPT, make variable, and to
  give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
  o correctly extends the timeout depending on the size of all
    queued messages for both transmit and receive
  o will not continue with receive if transmit times out
  o ensures that the error callback is done for all queued tx
    and rx messages
  o correctly detects both tx and rx timeouts, only delivers one to
    the callback, and does not overwrite an earlier error
  o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
  technically correct
- many Hymod board changes
parent 52f52c14
......@@ -2,6 +2,41 @@
Changes since U-Boot 0.3.1:
======================================================================
* Patches by Murray Jensen, 17 Jun 2003:
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
* Patches by Robert Schwebel, 14 Jun 2003:
- add support for Logotronic DL datalogger board
- cleanup serial line after kermit binary download
......
......@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o bsp.o eeprom.o fetch.o
OBJS = $(BOARD).o flash.o bsp.o eeprom.o fetch.o input.o env.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
......
......@@ -20,13 +20,12 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* hacked for Hymod FPGA support by Murray.Jensen@cmst.csiro.au, 29-Jan-01
* hacked for Hymod FPGA support by Murray.Jensen@csiro.au, 29-Jan-01
*/
#include <common.h>
#include <command.h>
#include <net.h>
#include <i2c.h>
#include <asm/iopin_8260.h>
#include <cmd_bsp.h>
......@@ -74,28 +73,29 @@
* has not worked (wait several ms?)
*/
int fpga_load (int mezz, uchar * addr, ulong size)
int
fpga_load (int mezz, uchar *addr, ulong size)
{
DECLARE_GLOBAL_DATA_PTR;
hymod_conf_t *cp = &gd->bd->bi_hymod_conf;
xlx_info_t *fp;
xlx_iopins_t *fpgaio;
volatile uchar *fpgabase;
volatile uint cnt;
uchar *eaddr = addr + size;
int result;
if (mezz) {
if (!cp->mezz.mmap[0].prog.exists)
return (LOAD_FAIL_NOCONF);
fpgabase = (uchar *) cp->mezz.mmap[0].prog.base;
fpgaio = &cp->mezz.iopins[0];
} else {
if (!cp->main.mmap[0].prog.exists)
return (LOAD_FAIL_NOCONF);
fpgabase = (uchar *) cp->main.mmap[0].prog.base;
fpgaio = &cp->main.iopins[0];
}
if (mezz)
fp = &cp->mezz.xlx[0];
else
fp = &cp->main.xlx[0];
if (!fp->mmap.prog.exists)
return (LOAD_FAIL_NOCONF);
fpgabase = (uchar *)fp->mmap.prog.base;
fpgaio = &fp->iopins;
/* set enable HIGH if required */
if (fpgaio->enable_pin.flag)
......@@ -106,7 +106,7 @@ int fpga_load (int mezz, uchar * addr, ulong size)
/* toggle PROG Low then High (will already be Low after Power-On) */
iopin_set_low (&fpgaio->prog_pin);
udelay (1); /* minimum 300ns - 1usec should do it */
udelay (1); /* minimum 300ns - 1usec should do it */
iopin_set_high (&fpgaio->prog_pin);
/* wait for INIT High */
......@@ -157,15 +157,15 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
case 2:
if (strcmp (argv[1], "info") == 0) {
printf ("\nHymod FPGA Info...\n");
printf (" Address Size\n");
printf (" Main Configuration: 0x%08x %d\n",
FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
printf (" Main Register: 0x%08x %d\n",
FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
printf (" Main Port: 0x%08x %d\n",
FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
printf (" Mezz Configuration: 0x%08x %d\n",
FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
printf ("\t\t\t\tAddress\t\tSize\n");
printf ("\tMain Configuration:\t0x%08x\t%d\n",
FPGA_MAIN_CFG_BASE, FPGA_MAIN_CFG_SIZE);
printf ("\tMain Register:\t\t0x%08x\t%d\n",
FPGA_MAIN_REG_BASE, FPGA_MAIN_REG_SIZE);
printf ("\tMain Port:\t\t0x%08x\t%d\n",
FPGA_MAIN_PORT_BASE, FPGA_MAIN_PORT_SIZE);
printf ("\tMezz Configuration:\t0x%08x\t%d\n",
FPGA_MEZZ_CFG_BASE, FPGA_MEZZ_CFG_SIZE);
return 0;
}
break;
......@@ -176,18 +176,21 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
save_addr = addr;
#if 0
/* reading config data unimplemented */
while VM
:more config data * addr++ = *fpga;
result = VM:? ? ?
/* fpga readback unimplemented */
while (more readback data)
*addr++ = *fpga;
result = error ? STORE_FAIL_XXX : STORE_SUCCESS;
#else
result = 0;
result = STORE_SUCCESS;
#endif
if (result == STORE_SUCCESS) {
printf ("SUCCEEDED (%d bytes)\n", addr - save_addr);
printf ("SUCCEEDED (%d bytes)\n",
addr - save_addr);
return 0;
} else
printf ("FAILED (%d bytes)\n", addr - save_addr);
printf ("FAILED (%d bytes)\n",
addr - save_addr);
return 1;
}
break;
......@@ -196,25 +199,32 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
if (strcmp (argv[1], "tftp") == 0) {
copy_filename (BootFile, argv[2], sizeof (BootFile));
load_addr = simple_strtoul (argv[3], NULL, 16);
NetBootFileXferSize = 0;
if (NetLoop (TFTP) <= 0) {
printf ("tftp transfer failed - aborting fgpa load\n");
printf ("tftp transfer failed - aborting "
"fgpa load\n");
return 1;
}
if (NetBootFileXferSize == 0) {
printf ("can't determine file size - aborting fpga load\n");
printf ("can't determine file size - "
"aborting fpga load\n");
return 1;
}
printf ("File transfer succeeded - beginning fpga load...");
printf ("File transfer succeeded - "
"beginning fpga load...");
result = fpga_load (0, (uchar *) load_addr,
NetBootFileXferSize);
NetBootFileXferSize);
if (result == LOAD_SUCCESS) {
printf ("SUCCEEDED\n");
return 0;
} else if (result == LOAD_FAIL_NOINIT)
} else if (result == LOAD_FAIL_NOCONF)
printf ("FAILED (no CONF)\n");
else if (result == LOAD_FAIL_NOINIT)
printf ("FAILED (no INIT)\n");
else
printf ("FAILED (no DONE)\n");
......@@ -231,7 +241,8 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
else if (strcmp (argv[2], "mezz") == 0)
mezz = 1;
else {
printf ("FPGA type must be either `main' or `mezz'\n");
printf ("FPGA type must be either "
"`main' or `mezz'\n");
return 1;
}
arg = 3;
......@@ -239,14 +250,18 @@ do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
mezz = 0;
arg = 2;
}
addr = (uchar *) simple_strtoul (argv[arg++], NULL, 16);
size = (ulong) simple_strtoul (argv[arg], NULL, 16);
result = fpga_load (mezz, addr, size);
if (result == LOAD_SUCCESS) {
printf ("SUCCEEDED\n");
return 0;
} else if (result == LOAD_FAIL_NOINIT)
} else if (result == LOAD_FAIL_NOCONF)
printf ("FAILED (no CONF)\n");
else if (result == LOAD_FAIL_NOINIT)
printf ("FAILED (no INIT)\n");
else
printf ("FAILED (no DONE)\n");
......@@ -267,22 +282,21 @@ int
do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
uchar data[HYMOD_EEPROM_SIZE];
uint offset;
int rcode = 0;
uint addr = CFG_I2C_EEPROM_ADDR;
switch (argc) {
case 1:
offset = HYMOD_EEOFF_MAIN;
addr |= HYMOD_EEOFF_MAIN;
break;
case 2:
if (strcmp (argv[1], "main") == 0) {
offset = HYMOD_EEOFF_MAIN;
addr |= HYMOD_EEOFF_MAIN;
break;
}
if (strcmp (argv[1], "mezz") == 0) {
offset = HYMOD_EEOFF_MEZZ;
addr |= HYMOD_EEOFF_MEZZ;
break;
}
/* fall through ... */
......@@ -293,15 +307,77 @@ do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
memset (data, 0, HYMOD_EEPROM_SIZE);
if (i2c_write
(CFG_I2C_EEPROM_ADDR | offset, 0, CFG_I2C_EEPROM_ADDR_LEN, data,
HYMOD_EEPROM_SIZE)) {
rcode = 1;
eeprom_write (addr, 0, data, HYMOD_EEPROM_SIZE);
return 0;
}
/* ------------------------------------------------------------------------- */
#if 0
static uchar test_bitfile[] = {
/* one day ... */
};
#endif
int
do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
#if 0
int rc;
#endif
#ifdef CONFIG_ETHER_LOOPBACK_TEST
extern void eth_loopback_test (void);
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
printf ("HYMOD tests - ensure loopbacks etc. are connected\n\n");
#if 0
/* Load FPGA with test program */
printf ("Loading test FPGA program ...");
rc = fpga_load (0, test_bitfile, sizeof (test_bitfile));
switch (rc) {
case LOAD_SUCCESS:
printf (" SUCCEEDED\n");
break;
case LOAD_FAIL_NOCONF:
printf (" FAILED (no configuration space defined)\n");
return 1;
case LOAD_FAIL_NOINIT:
printf (" FAILED (timeout - no INIT signal seen)\n");
return 1;
case LOAD_FAIL_NODONE:
printf (" FAILED (timeout - no DONE signal seen)\n");
return 1;
default:
printf (" FAILED (unknown return code from fpga_load\n");
return 1;
}
return rcode;
/* run Local Bus <=> Xilinx tests */
/* tell Xilinx to run ZBT Ram, High Speed serial and Mezzanine tests */
/* run SDRAM test */
#endif
#ifdef CONFIG_ETHER_LOOPBACK_TEST
/* run Ethernet test */
eth_loopback_test ();
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
return 0;
}
#endif /* CFG_CMD_BSP */
#endif /* CFG_CMD_BSP */
/* ------------------------------------------------------------------------- */
......@@ -29,4 +29,4 @@ TEXT_BASE = 0x40000000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data
OBJCFLAGS = --remove-section=.ppcenv
/*
* (C) Copyright 2001
* Murray Jensen, CSIRO Manufacturing Science and Technology,
* <Murray.Jensen@cmst.csiro.au>
* Murray Jensen, CSIRO-MIT, <Murray.Jensen@csiro.au>
*
* See file CREDITS for list of people who contributed to this
* project.
......@@ -26,396 +25,408 @@
#include <mpc8260.h>
/* imports from fetch.c */
extern int fetch_and_parse(bd_t *, char *, ulong, int (*)(uchar *, uchar *));
extern int fetch_and_parse (char *, ulong, int (*)(uchar *, uchar *));
int
eeprom_load(unsigned offset, hymod_eeprom_t *ep)
{
uchar data[HYMOD_EEPROM_SIZE], *dp, *edp;
hymod_eehdr_t *hp;
ulong len, crc;
memset(ep, 0, sizeof *ep);
memset(data, 0, HYMOD_EEPROM_SIZE);
crc = 0;
hp = (hymod_eehdr_t *)data;
eeprom_read(CFG_DEF_EEPROM_ADDR, offset, (uchar *)hp, sizeof (*hp));
offset += sizeof (*hp);
if (hp->id != HYMOD_EEPROM_ID || hp->ver > HYMOD_EEPROM_VER ||
(len = hp->len) > HYMOD_EEPROM_MAXLEN)
return (0);
dp = (uchar *)(hp + 1); edp = dp + len;
eeprom_read(CFG_DEF_EEPROM_ADDR, offset, dp, len);
offset += len;
eeprom_read(CFG_DEF_EEPROM_ADDR, offset, (uchar *)&crc, sizeof (ulong));
if (crc32(0, data, edp - data) != crc)
return (0);
ep->ver = hp->ver;
/* imports from input.c */
extern int hymod_get_serno (const char *);
for (;;) {
hymod_eerec_t *rp = (hymod_eerec_t *)dp;
ulong rtyp;
uchar rlen, *rdat;
uint rsiz;
/* this is relative to the root of the server's tftp directory */
static char *def_bddb_cfgdir = "/hymod/bddb";
if (rp->small.topbit == 0) {
rtyp = rp->small.type;
rlen = rp->small.len;
rdat = rp->small.data;
rsiz = offsetof(hymod_eerec_t, small.data) + rlen;
}
else if (rp->medium.nxtbit == 0) {
rtyp = rp->medium.type;
rlen = rp->medium.len;
rdat = rp->medium.data;
rsiz = offsetof(hymod_eerec_t, medium.data) + rlen;
}
else {
rtyp = rp->large.type;
rlen = rp->large.len;
rdat = rp->large.data;
rsiz = offsetof(hymod_eerec_t, large.data) + rlen;
}
static int
hymod_eeprom_load (int which, hymod_eeprom_t *ep)
{
unsigned dev_addr = CFG_I2C_EEPROM_ADDR | \
(which ? HYMOD_EEOFF_MEZZ : HYMOD_EEOFF_MAIN);
unsigned offset = 0;
uchar data[HYMOD_EEPROM_SIZE], *dp, *edp;
hymod_eehdr_t *hp;
ulong len, crc;
memset (ep, 0, sizeof *ep);
memset (data, 0, HYMOD_EEPROM_SIZE);
crc = 0;
hp = (hymod_eehdr_t *)data;
eeprom_read (dev_addr, offset, (uchar *)hp, sizeof (*hp));
offset += sizeof (*hp);
if (hp->id != HYMOD_EEPROM_ID || hp->ver > HYMOD_EEPROM_VER ||
(len = hp->len) > HYMOD_EEPROM_MAXLEN)
return (0);
dp = (uchar *)(hp + 1); edp = dp + len;
eeprom_read (dev_addr, offset, dp, len);
offset += len;
eeprom_read (dev_addr, offset, (uchar *)&crc, sizeof (ulong));
if (crc32 (0, data, edp - data) != crc)
return (0);
ep->ver = hp->ver;
for (;;) {
hymod_eerec_t *rp = (hymod_eerec_t *)dp;
ulong rtyp;
uchar rlen, *rdat;
uint rsiz;
if (rp->small.topbit == 0) {
rtyp = rp->small.type;
rlen = rp->small.len;
rdat = rp->small.data;
rsiz = offsetof (hymod_eerec_t, small.data) + rlen;
}
else if (rp->medium.nxtbit == 0) {
rtyp = rp->medium.type;
rlen = rp->medium.len;
rdat = rp->medium.data;
rsiz = offsetof (hymod_eerec_t, medium.data) + rlen;
}
else {
rtyp = rp->large.type;
rlen = rp->large.len;
rdat = rp->large.data;
rsiz = offsetof (hymod_eerec_t, large.data) + rlen;
}
if (rtyp == 0)
break;
dp += rsiz;
if (dp > edp) /* error? */
break;
switch (rtyp) {
case HYMOD_EEREC_SERNO: /* serial number */
if (rlen == sizeof (ulong))
memcpy(&ep->serno, rdat, sizeof (ulong));
break;
case HYMOD_EEREC_DATE: /* date */
if (rlen == sizeof (hymod_date_t))
memcpy(&ep->date, rdat, sizeof (hymod_date_t));
break;
case HYMOD_EEREC_BATCH: /* batch */
if (rlen <= HYMOD_MAX_BATCH)
memcpy(ep->batch, rdat, ep->batchlen = rlen);
break;
case HYMOD_EEREC_TYPE: /* board type */
if (rlen == 1)
ep->bdtype = *rdat;
break;
case HYMOD_EEREC_REV: /* board revision */
if (rlen == 1)
ep->bdrev = *rdat;
break;
case HYMOD_EEREC_SDRAM: /* sdram size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_SDRAM) {
int i;
for (i = 0; i < rlen; i++)
ep->sdramsz[i] = rdat[i];
ep->nsdram = rlen;
}
break;
case HYMOD_EEREC_FLASH: /* flash size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_FLASH) {
int i;
for (i = 0; i < rlen; i++)
ep->flashsz[i] = rdat[i];
ep->nflash = rlen;
}
break;
case HYMOD_EEREC_ZBT: /* zbt ram size(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_ZBT) {
int i;
for (i = 0; i < rlen; i++)
ep->zbtsz[i] = rdat[i];
ep->nzbt = rlen;
}
break;
case HYMOD_EEREC_XLXTYP: /* xilinx fpga type(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].type = rdat[i];
ep->nxlx = rlen;
}
break;
case HYMOD_EEREC_XLXSPD: /* xilinx fpga speed(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].speed = rdat[i];
}
break;
case HYMOD_EEREC_XLXTMP: /* xilinx fpga temperature(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].temp = rdat[i];
}
break;
case HYMOD_EEREC_XLXGRD: /* xilinx fpga grade(s) */
if (rlen > 0 && rlen <= HYMOD_MAX_XLX) {
int i;
for (i = 0; i < rlen; i++)
ep->xlx[i].grade = rdat[i];
}
break;
case HYMOD_EEREC_CPUTYP: /* CPU type */
if (rlen == 1)
ep->mpc.type = *rdat;
break;
case HYMOD_EEREC_CPUSPD: /* CPU speed */
if (rlen == 1)
ep->mpc.cpuspd = *rdat;
break;
case HYMOD_EEREC_CPMSPD: /* CPM speed */
if (rlen == 1)
ep->mpc.cpmspd = *rdat;
break;
case HYMOD_EEREC_BUSSPD: /* bus speed */
if (rlen == 1)
ep->mpc.busspd = *rdat;
break;
case HYMOD_EEREC_HSTYPE: /* high-speed serial chip type */
if (rlen == 1)
ep->hss.type = *rdat;
break;
case HYMOD_EEREC_HSCHIN: /* high-speed serial input channels */
if (rlen ==