Commit 7582e39e authored by Hans de Goede's avatar Hans de Goede
Browse files

sun6i: dram: Do not try to initialize a second dram chan on A31s



The A31s only has one dram channel, so do not bother with trying to initialize
a second channel.
Signed-off-by: default avatarHans de Goede <hdegoede@redhat.com>
Acked-by: default avatarIan Campbell <ijc@hellion.org.uk>
parent 10191ed0
......@@ -10,6 +10,7 @@
obj-y += timer.o
obj-y += board.o
obj-y += clock.o
obj-y += cpu_info.o
obj-y += pinmux.o
obj-$(CONFIG_MACH_SUN6I) += prcm.o
obj-$(CONFIG_MACH_SUN8I) += prcm.o
......@@ -21,7 +22,6 @@ obj-$(CONFIG_MACH_SUN7I) += clock_sun4i.o
obj-$(CONFIG_MACH_SUN8I) += clock_sun6i.o
ifndef CONFIG_SPL_BUILD
obj-y += cpu_info.o
ifdef CONFIG_ARMV7_PSCI
obj-y += psci.o
endif
......
......@@ -369,18 +369,26 @@ unsigned long sunxi_dram_init(void)
.rows = 16,
};
/* A31s only has one channel */
if (sunxi_get_ss_bonding_id() == SUNXI_SS_BOND_ID_A31S)
para.chan = 1;
mctl_sys_init();
mctl_dll_init(0, &para);
mctl_dll_init(1, &para);
setbits_le32(&mctl_com->ccr, MCTL_CCR_CH0_CLK_EN);
if (para.chan == 2) {
mctl_dll_init(1, &para);
setbits_le32(&mctl_com->ccr, MCTL_CCR_CH1_CLK_EN);
}
setbits_le32(&mctl_com->ccr,
MCTL_CCR_MASTER_CLK_EN |
MCTL_CCR_CH0_CLK_EN |
MCTL_CCR_CH1_CLK_EN);
setbits_le32(&mctl_com->ccr, MCTL_CCR_MASTER_CLK_EN);
mctl_channel_init(0, &para);
mctl_channel_init(1, &para);
if (para.chan == 2)
mctl_channel_init(1, &para);
mctl_com_init(&para);
mctl_port_cfg();
......
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