Commit 7644f16f authored by Stefan Roese's avatar Stefan Roese
Browse files

esd CPCI2DP board added

Patch by Matthias Fuchs, 22 Sep 2005
parent 026cb5d8
......@@ -2,6 +2,9 @@
Changes for U-Boot 1.1.4:
======================================================================
* esd CPCI2DP board added
Patch by Matthias Fuchs, 22 Sep 2005
* esd PMC405 board updated
Patch by Matthias Fuchs, 22 Sep 2005
......
......@@ -136,6 +136,7 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
AR405 PPC405GP
ASH405 PPC405EP
CANBT PPC405CR
CPCI2DP PPC405GP
CPCI405 PPC405GP
CPCI4052 PPC405GP
CPCI405AB PPC405GP
......
......@@ -62,17 +62,17 @@ LIST_8xx=" \
LIST_4xx=" \
ADCIOP AR405 ASH405 bubinga \
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 csb272 \
csb472 DASA_SIM DP405 DU405 \
ebony ERIC EXBITGEN G2000 \
HUB405 JSE KAREF METROBOX \
MIP405 MIP405T ML2 ml300 \
ocotea OCRTC ORSG PCI405 \
PIP405 PLU405 PMC405 PPChameleonEVB \
sbc405 VOH405 W7OLMC W7OLMG \
walnut WUH405 XPEDITE1K yellowstone \
yosemite \
CANBT CPCI2DP CPCI405 CPCI4052 \
CPCI405AB CPCI440 CPCIISER4 CRAYL1 \
csb272 csb472 DASA_SIM DP405 \
DU405 ebony ERIC EXBITGEN \
G2000 HUB405 JSE KAREF \
METROBOX MIP405 MIP405T ML2 \
ml300 ocotea OCRTC ORSG \
PCI405 PIP405 PLU405 PMC405 \
PPChameleonEVB sbc405 VOH405 W7OLMC \
W7OLMG walnut WUH405 XPEDITE1K \
yellowstone yosemite \
"
#########################################################################
......
......@@ -754,6 +754,9 @@ CATcenter_33_config: unconfig
}
@./mkconfig -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
CPCI2DP_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpci2dp esd
CPCI405_config \
CPCI4052_config \
CPCI405DT_config \
......
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o ../common/misc.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
sinclude .depend
#########################################################################
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# esd CPCI2DP board
#
TEXT_BASE = 0xFFFC0000
/*
* (C) Copyright 2005
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/processor.h>
#include <command.h>
#include <malloc.h>
int board_early_init_f (void)
{
unsigned long cntrl0Reg;
/*
* Setup GPIO pins (CS4 as GPIO)
*/
cntrl0Reg = mfdcr(cntrl0);
mtdcr(cntrl0, cntrl0Reg | 0x00800000);
out32(GPIO0_OR, CFG_INTA_FAKE | CFG_EEPROM_WP); /* set output pins to high */
out32(GPIO0_ODR, CFG_INTA_FAKE); /* INTA# is open drain */
out32(GPIO0_TCR, CFG_INTA_FAKE | CFG_EEPROM_WP); /* setup for output */
/*
* IRQ 0-15 405GP internally generated; active high; level sensitive
* IRQ 16 405GP internally generated; active low; level sensitive
* IRQ 17-24 RESERVED
* IRQ 25 (EXT IRQ 0) PB0; active low; level sensitive
* IRQ 26 (EXT IRQ 1) PB1; active low; level sensitive
* IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
* IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
* IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
* IRQ 31 (EXT IRQ 6) unused
*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uicer, 0x00000000); /* disable all ints */
mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
mtdcr(uictr, 0x10000000); /* set int trigger levels */
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
return 0;
}
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
int misc_init_r (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned long cntrl0Reg;
/* adjust flash start and offset */
gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
gd->bd->bi_flashoffset = 0;
/*
* Select cts (and not dsr) on uart1
*/
cntrl0Reg = mfdcr(cntrl0);
mtdcr(cntrl0, cntrl0Reg | 0x00001000);
return (0);
}
/*
* Check Board Identity:
*/
int checkboard (void)
{
unsigned char str[64];
int i = getenv_r ("serial#", str, sizeof(str));
puts ("Board: ");
if (i == -1) {
puts ("### No HW ID - assuming CPCI2DP");
} else {
puts(str);
}
printf(" (Ver 1.0)");
putc ('\n');
return 0;
}
/* ------------------------------------------------------------------------- */
long int initdram (int board_type)
{
unsigned long val;
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
int testdram (void)
{
/* TODO: XXX XXX XXX */
printf ("test: 64 MB - ok\n");
return (0);
}
/* ------------------------------------------------------------------------- */
#if defined(CFG_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
* 0: disable write
* 1: enable write
* Returns: -1: wrong device address
* 0: dis-/en- able done
* 0/1: current state if <state> was -1.
*/
int eeprom_write_enable (unsigned dev_addr, int state) {
if (CFG_I2C_EEPROM_ADDR != dev_addr) {
return -1;
}
else {
switch (state) {
case 1:
/* Enable write access, clear bit GPIO_SINT2. */
out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_EEPROM_WP);
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO_SINT2. */
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
state = 0;
break;
default:
/* Read current status back. */
state = (0 == (in32(GPIO0_OR) & CFG_EEPROM_WP));
break;
}
}
return state;
}
#endif
#if defined(CFG_EEPROM_WREN)
int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int query = argc == 1;
int state = 0;
if (query) {
/* Query write access state. */
state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, -1);
if (state < 0) {
puts ("Query of write access state failed.\n");
}
else {
printf ("Write access for device 0x%0x is %sabled.\n",
CFG_I2C_EEPROM_ADDR, state ? "en" : "dis");
state = 0;
}
}
else {
if ('0' == argv[1][0]) {
/* Disable write access. */
state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 0);
}
else {
/* Enable write access. */
state = eeprom_write_enable (CFG_I2C_EEPROM_ADDR, 1);
}
if (state < 0) {
puts ("Setup of write access state failed.\n");
}
}
return state;
}
U_BOOT_CMD(
eepwren, 2, 0, do_eep_wren,
"eepwren - Enable / disable / query EEPROM write access\n",
NULL
);
#endif /* #if defined(CFG_EEPROM_WREN) */
/*
* (C) Copyright 2001
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <ppc4xx.h>
#include <asm/processor.h>
/*
* include common flash code (for esd boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static void flash_get_offsets (ulong base, flash_info_t *info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
unsigned long size_b0;
int i;
uint pbcr;
unsigned long base_b0;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* Static FLASH Bank configuration here - FIXME XXX */
size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
size_b0, size_b0<<20);
}
/* Setup offsets */
flash_get_offsets (-size_b0, &flash_info[0]);
/* Re-do sizing to get full correct info */
mtdcr(ebccfga, pb0cr);
pbcr = mfdcr(ebccfgd);
mtdcr(ebccfga, pb0cr);
base_b0 = -size_b0;
pbcr = (pbcr & 0x0001ffff) | base_b0 | (((size_b0/1024/1024)-1)<<17);
mtdcr(ebccfgd, pbcr);
/* printf("pb1cr = %x\n", pbcr); */
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
-monitor_flash_len,
0xffffffff,
&flash_info[0]);
flash_info[0].size = size_b0;
return (size_b0);
}
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
/* Do we need any of these for elf?
__DYNAMIC = 0; */
SECTIONS
{
.resetvec 0xFFFFFFFC :
{
*(.resetvec)
} = 0xffff
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
/* WARNING - the following is hand-optimized to fit within */
/* the sector layout of our flash chips! XXX FIXME XXX */
cpu/ppc4xx/start.o (.text)
cpu/ppc4xx/traps.o (.text)
cpu/ppc4xx/interrupts.o (.text)
cpu/ppc4xx/serial.o (.text)
cpu/ppc4xx/cpu_init.o (.text)
cpu/ppc4xx/speed.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
/* . = env_offset;*/
/* common/environment.o(.text)*/
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
}
_end = . ;
PROVIDE (end = .);
}
/*
* (C) Copyright 2005
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* board/config.h - configuration options, board specific
*/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */
#define CONFIG_BAUDRATE 9600
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
#undef CONFIG_BOOTARGS
#undef CONFIG_BOOTCOMMAND
#define CONFIG_PREBOOT /* enable preboot variable */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
<